Re: [PATCH v3 02/30] Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core

[Richard Henderson]

On 9/20/21 2:23 PM, Taylor Simpson wrote:
> HVX is a set of wide vector instructions.  Machine state includes
>      vector registers (VRegs)
>      vector predicate registers (QRegs)
>      temporary registers for intermediate values
>      store buffer (masked stores and scatter/gather)
>
> Signed-off-by: Taylor Simpson<tsimpson@quicinc.com>
> ---

Acked-by: Richard Henderson <richard.henderson@linaro.org>


r~