Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0

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Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0

From:	Jim Wilson
Subject:	Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0
Date:	Mon, 27 Sep 2021 13:23:09 -0700

On Mon, Sep 27, 2021 at 1:01 PM Vineet Gupta <vineetg@rivosinc.com> wrote:

So I obviously forgot to get the equivalent binutils branch, but the
only rvb branch on sifive fork feels dated

https://github.com/riscv-collab/riscv-binutils-gdb/tree/riscv-binutils-2.35-rvb

That is the right branch to use with the gcc that you are using. This stuff hasn't been actively maintained so we have old gcc and binutils release versions.

We are in the process of putting stuff upstream now.

Jim

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Re: [PATCH v11 03/16] target/riscv: clwz must ignore high bits (use shift-left & changed logic), (continued)
- [PATCH v11 09/16] target/riscv: Add instructions of the Zbc-extension, Philipp Tomsich, 2021/09/11
- [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/11
- [PATCH v11 12/16] target/riscv: Add a REQUIRE_32BIT macro, Philipp Tomsich, 2021/09/11
- [PATCH v11 16/16] disas/riscv: Add Zb[abcs] instructions, Philipp Tomsich, 2021/09/11
- [PATCH v11 08/16] target/riscv: Reassign instructions to the Zbs-extension, Philipp Tomsich, 2021/09/11
- [PATCH v11 07/16] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Philipp Tomsich, 2021/09/11
- Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Philipp Tomsich, 2021/09/23
  - Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Alistair Francis, 2021/09/23
- Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Vineet Gupta, 2021/09/27
  - Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Jim Wilson <=
    - Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Vineet Gupta, 2021/09/27

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