Re: [PATCH 08/31] target/loongarch: Add tlb instruction support

[Richard Henderson]

On 10/29/21 12:01 AM, yangxiaojuan wrote:
> > > +    env->CSR_CPUID = (cs->cpu_index & 0x1ff);
> >
> > Any reason to have a copy of cpu_index, as opposed to just using that field?  
> > CSR_CPUID is read-only after all.
> Yes, we need this value, the uefi code read this CPUID when Start slave cores.

That's not what I meant.  You could arrange for the csr read from CPUID to read from 
cs->cpu_index instead of env->CSR_CPUID.  You don't need a *separate* copy of this value.

I'm a bit concerned about the masking as well.  It would be better for hw/ to ensure that 
there are no more than 511 cpus.  Otherwise you'll have multiple cpus with identical CPUID.

> > ... we have defined interfaces for getting random numbers.
> Do you mean the qemu_guest_getrandom function? It gets random values that do 
> not limit the range.
> But I need a random in a fixed range, I cannot find the  Similar interface. 
> Thanks.

Yes, I mean qemu_guest_getrandom.

    uint32_t val;
    qemu_guest_getrandom_nofail(&val, sizeof(val));
    return val % (high - low + 1) + low;


r~