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[PULL 057/102] target/ppc: Fix MPCxxx FPU interrupt address
From: |
Cédric Le Goater |
Subject: |
[PULL 057/102] target/ppc: Fix MPCxxx FPU interrupt address |
Date: |
Wed, 15 Dec 2021 18:03:12 +0100 |
From: Fabiano Rosas <farosas@linux.ibm.com>
The Floating-point Unavailable and Decrementer interrupts are being
registered at the same 0x900 address. The FPU should be at 0x800
instead.
Verified on MPC555, MPC860 and MPC885 user manuals.
Reported-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211208123029.2052625-2-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/cpu_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index ed0e2136d9c8..7e61994e3596 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -2155,7 +2155,7 @@ static void init_excp_MPC5xx(CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
- env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
+ env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
@@ -2182,7 +2182,7 @@ static void init_excp_MPC8xx(CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
- env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
+ env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
--
2.31.1
- [PULL 046/102] softfloat: Add float64r32 arithmetic routines, (continued)
- [PULL 046/102] softfloat: Add float64r32 arithmetic routines, Cédric Le Goater, 2021/12/15
- [PULL 049/102] target/ppc: Add helpers for fadds, fsubs, fdivs, Cédric Le Goater, 2021/12/15
- [PULL 054/102] target/ppc: Disable software TLB for the 7450 family, Cédric Le Goater, 2021/12/15
- [PULL 053/102] target/ppc: Use helper_todouble/tosingle in helper_xststdcsp, Cédric Le Goater, 2021/12/15
- [PULL 058/102] target/ppc: Remove 603e exception model, Cédric Le Goater, 2021/12/15
- [PULL 062/102] ppc: Mark the 'taihu' machine as deprecated, Cédric Le Goater, 2021/12/15
- [PULL 043/102] target/ppc: Update sqrt for new flags, Cédric Le Goater, 2021/12/15
- [PULL 056/102] target/ppc: Remove the software TLB model of 7450 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 059/102] target/ppc: Set 601v exception model id, Cédric Le Goater, 2021/12/15
- [PULL 066/102] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/15
- [PULL 057/102] target/ppc: Fix MPCxxx FPU interrupt address,
Cédric Le Goater <=
- [PULL 052/102] target/ppc: Update fres to new flags and float64r32, Cédric Le Goater, 2021/12/15
- [PULL 045/102] target/ppc: Update fre to new flags, Cédric Le Goater, 2021/12/15
- [PULL 060/102] target/ppc: remove 401/403 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 064/102] ppc/ppc405: Convert printfs to trace-events, Cédric Le Goater, 2021/12/15
- [PULL 069/102] ppc/ppc405: Rework FW load, Cédric Le Goater, 2021/12/15
- [PULL 063/102] ppc: Add trace-events for DCR accesses, Cédric Le Goater, 2021/12/15
- [PULL 073/102] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information, Cédric Le Goater, 2021/12/15
- [PULL 074/102] ppc/ppc405: Add update of bi_procfreq field, Cédric Le Goater, 2021/12/15
- [PULL 068/102] ppc/ppc405: Remove flash support, Cédric Le Goater, 2021/12/15
- [PULL 067/102] ppc/ppc405: Add some address space definitions, Cédric Le Goater, 2021/12/15