Re: [PATCH v3 0/2] Aspeed I3C device model

[Peter Maydell]

On Tue, 11 Jan 2022 at 08:48, Troy Lee <troy_lee@aspeedtech.com> wrote:
>
> This series of patch introduce a dummy implemenation of aspeed i3c
> model, and it provide just enough information for guest machine.
> However, the driver probing is still failed, but it will not cause
> kernel panic.
>
> v3:
> - Remove unused AspeedI3CClass
> - Refine memory region
> - Refine register reset
> - Remove unrelated changes to SPI2 address
> - Remove i3c controller irq line
>
> v2:
> - Split i3c model into i3c and i3c_device
> - Create 6x i3c devices
> - Using register fields macro
> - Rebase to mainline QEMU
>
> Troy Lee (2):
>   Introduce a dummy AST2600 I3C model.
>   This patch includes i3c instance in ast2600 soc.

Applied to target-arm.next, thanks. I have tidied up the commit messages
a bit (removing the v2/v3 changes information, for instance).

I would echo Cédric's suggestion that you send a patch that
updates the documentation to note that this device is
now partially implemented.

-- PMM