[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v4 25/42] hw/cxl/device: Add some trivial commands
|
From: |
Jonathan Cameron |
|
Subject: |
[PATCH v4 25/42] hw/cxl/device: Add some trivial commands |
|
Date: |
Mon, 24 Jan 2022 17:16:48 +0000 |
From: Ben Widawsky <ben.widawsky@intel.com>
GET_FW_INFO and GET_PARTITION_INFO, for this emulation, is equivalent to
info already returned in the IDENTIFY command. To have a more robust
implementation, add those.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/cxl/cxl-mailbox-utils.c | 66 ++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index c03ba00912..cbda963d8c 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -43,6 +43,8 @@ enum {
#define CLEAR_RECORDS 0x1
#define GET_INTERRUPT_POLICY 0x2
#define SET_INTERRUPT_POLICY 0x3
+ FIRMWARE_UPDATE = 0x02,
+ #define GET_INFO 0x0
TIMESTAMP = 0x03,
#define GET 0x0
#define SET 0x1
@@ -51,6 +53,8 @@ enum {
#define GET_LOG 0x1
IDENTIFY = 0x40,
#define MEMORY_DEVICE 0x0
+ CCLS = 0x41,
+ #define GET_PARTITION_INFO 0x0
};
/* 8.2.8.4.5.1 Command Return Codes */
@@ -125,11 +129,13 @@ define_mailbox_handler_zeroed(EVENTS_GET_RECORDS, 0x20);
define_mailbox_handler_nop(EVENTS_CLEAR_RECORDS);
define_mailbox_handler_zeroed(EVENTS_GET_INTERRUPT_POLICY, 4);
define_mailbox_handler_nop(EVENTS_SET_INTERRUPT_POLICY);
+declare_mailbox_handler(FIRMWARE_UPDATE_GET_INFO);
declare_mailbox_handler(TIMESTAMP_GET);
declare_mailbox_handler(TIMESTAMP_SET);
declare_mailbox_handler(LOGS_GET_SUPPORTED);
declare_mailbox_handler(LOGS_GET_LOG);
declare_mailbox_handler(IDENTIFY_MEMORY_DEVICE);
+declare_mailbox_handler(CCLS_GET_PARTITION_INFO);
#define IMMEDIATE_CONFIG_CHANGE (1 << 1)
#define IMMEDIATE_POLICY_CHANGE (1 << 3)
@@ -143,15 +149,50 @@ static struct cxl_cmd cxl_cmd_set[256][256] = {
CXL_CMD(EVENTS, CLEAR_RECORDS, ~0, IMMEDIATE_LOG_CHANGE),
CXL_CMD(EVENTS, GET_INTERRUPT_POLICY, 0, 0),
CXL_CMD(EVENTS, SET_INTERRUPT_POLICY, 4, IMMEDIATE_CONFIG_CHANGE),
+ CXL_CMD(FIRMWARE_UPDATE, GET_INFO, 0, 0),
CXL_CMD(TIMESTAMP, GET, 0, 0),
CXL_CMD(TIMESTAMP, SET, 8, IMMEDIATE_POLICY_CHANGE),
CXL_CMD(LOGS, GET_SUPPORTED, 0, 0),
CXL_CMD(LOGS, GET_LOG, 0x18, 0),
CXL_CMD(IDENTIFY, MEMORY_DEVICE, 0, 0),
+ CXL_CMD(CCLS, GET_PARTITION_INFO, 0, 0),
};
#undef CXL_CMD
+/*
+ * 8.2.9.2.1
+ */
+define_mailbox_handler(FIRMWARE_UPDATE_GET_INFO)
+{
+ struct {
+ uint8_t slots_supported;
+ uint8_t slot_info;
+ uint8_t caps;
+ uint8_t rsvd[0xd];
+ char fw_rev1[0x10];
+ char fw_rev2[0x10];
+ char fw_rev3[0x10];
+ char fw_rev4[0x10];
+ } __attribute__((packed)) *fw_info;
+ _Static_assert(sizeof(*fw_info) == 0x50, "Bad firmware info size");
+
+ if (cxl_dstate->pmem_size < (256 << 20)) {
+ return CXL_MBOX_INTERNAL_ERROR;
+ }
+
+ fw_info = (void *)cmd->payload;
+ memset(fw_info, 0, sizeof(*fw_info));
+
+ fw_info->slots_supported = 2;
+ fw_info->slot_info = BIT(0) | BIT(3);
+ fw_info->caps = 0;
+ snprintf(fw_info->fw_rev1, 0x10, "BWFW VERSION %02d", 0);
+
+ *len = sizeof(*fw_info);
+ return CXL_MBOX_SUCCESS;
+}
+
/*
* 8.2.9.3.1
*/
@@ -299,6 +340,31 @@ define_mailbox_handler(IDENTIFY_MEMORY_DEVICE)
return CXL_MBOX_SUCCESS;
}
+define_mailbox_handler(CCLS_GET_PARTITION_INFO)
+{
+ struct {
+ uint64_t active_vmem;
+ uint64_t active_pmem;
+ uint64_t next_vmem;
+ uint64_t next_pmem;
+ } __attribute__((packed)) *part_info = (void *)cmd->payload;
+ _Static_assert(sizeof(*part_info) == 0x20, "Bad get partition info size");
+ uint64_t size = cxl_dstate->pmem_size;
+
+ if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
+ return CXL_MBOX_INTERNAL_ERROR;
+ }
+
+ /* PMEM only */
+ part_info->active_vmem = 0;
+ part_info->next_vmem = 0;
+ part_info->active_pmem = size / (256 << 20);
+ part_info->next_pmem = part_info->active_pmem;
+
+ *len = sizeof(*part_info);
+ return CXL_MBOX_SUCCESS;
+}
+
void cxl_process_mailbox(CXLDeviceState *cxl_dstate)
{
uint16_t ret = CXL_MBOX_SUCCESS;
--
2.32.0
- Re: [PATCH v4 16/42] tests/acpi: Add update DSDT.viot, (continued)
- [PATCH v4 17/42] cxl: Machine level control on whether CXL support is enabled, Jonathan Cameron, 2022/01/24
- [PATCH v4 18/42] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142), Jonathan Cameron, 2022/01/24
- [PATCH v4 19/42] hw/cxl/rp: Add a root port, Jonathan Cameron, 2022/01/24
- [PATCH v4 20/42] hw/cxl/device: Add a memory device (8.2.8.5), Jonathan Cameron, 2022/01/24
- [PATCH v4 21/42] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), Jonathan Cameron, 2022/01/24
- [PATCH v4 22/42] acpi/cxl: Add _OSC implementation (9.14.2), Jonathan Cameron, 2022/01/24
- [PATCH v4 23/42] tests/acpi: allow CEDT table addition, Jonathan Cameron, 2022/01/24
- [PATCH v4 24/42] acpi/cxl: Create the CEDT (9.14.1), Jonathan Cameron, 2022/01/24
- [PATCH v4 25/42] hw/cxl/device: Add some trivial commands,
Jonathan Cameron <=
- [PATCH v4 26/42] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing, Jonathan Cameron, 2022/01/24
- [PATCH v4 27/42] hw/cxl/device: Implement get/set Label Storage Area (LSA), Jonathan Cameron, 2022/01/24
- [PATCH v4 28/42] hw/cxl/component: Add utils for interleave parameter encoding/decoding, Jonathan Cameron, 2022/01/24
- [PATCH v4 29/42] hw/cxl/host: Add support for CXL Fixed Memory Windows., Jonathan Cameron, 2022/01/24
- [PATCH v4 30/42] acpi/cxl: Introduce CFMWS structures in CEDT, Jonathan Cameron, 2022/01/24
- [PATCH v4 31/42] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl, Jonathan Cameron, 2022/01/24