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Re: [PATCH v4 29/42] hw/cxl/host: Add support for CXL Fixed Memory Windo
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From: |
Jonathan Cameron |
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Subject: |
Re: [PATCH v4 29/42] hw/cxl/host: Add support for CXL Fixed Memory Windows. |
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Date: |
Tue, 25 Jan 2022 17:51:30 +0000 |
On Tue, 25 Jan 2022 17:02:32 +0000
Alex Bennée <alex.bennee@linaro.org> wrote:
> Jonathan Cameron <Jonathan.Cameron@huawei.com> writes:
>
> > From: Jonathan Cameron <jonathan.cameron@huawei.com>
> >
> > The concept of these is introduced in [1] in terms of the
> > description the CEDT ACPI table. The principal is more general.
> > Unlike once traffic hits the CXL root bridges, the host system
> > memory address routing is implementation defined and effectively
> > static once observable by standard / generic system software.
> > Each CXL Fixed Memory Windows (CFMW) is a region of PA space
> > which has fixed system dependent routing configured so that
> > accesses can be routed to the CXL devices below a set of target
> > root bridges. The accesses may be interleaved across multiple
> > root bridges.
>
> This breaks the linux-user builds...
> > diff --git a/hw/cxl/meson.build b/hw/cxl/meson.build
> > index 0eca715d10..27dff3868b 100644
> > --- a/hw/cxl/meson.build
> > +++ b/hw/cxl/meson.build
> > @@ -1,5 +1,9 @@
> > -softmmu_ss.add(when: 'CONFIG_CXL', if_true: files(
> > - 'cxl-component-utils.c',
> > - 'cxl-device-utils.c',
> > - 'cxl-mailbox-utils.c',
> > +specific_ss.add(when: 'CONFIG_CXL', if_true: files(
> > + 'cxl-component-utils.c',
> > + 'cxl-device-utils.c',
> > + 'cxl-mailbox-utils.c',
> > + 'cxl-host.c',
> > +))
> > +specific_ss.add(when: 'CONFIG_CXL', if_false: files(
> > + 'cxl-host-stubs.c',
> > ))
>
> I think you want this:
>
> softmmu_ss.add(when: 'CONFIG_CXL',
> if_true: files(
> 'cxl-component-utils.c',
> 'cxl-device-utils.c',
> 'cxl-mailbox-utils.c',
> 'cxl-host.c'),
> if_false: files(
> 'cxl-host-stubs.c',
> ))
>
> # This is required as well:
> softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))
Ah. I'd started with the first block and got incomprehensible error
message. Second block fixes it.
I'll not pretend to understand the 'why' :)
Thanks,
Jonathan
>
>
- [PATCH v4 21/42] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), (continued)
- [PATCH v4 21/42] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12), Jonathan Cameron, 2022/01/24
- [PATCH v4 22/42] acpi/cxl: Add _OSC implementation (9.14.2), Jonathan Cameron, 2022/01/24
- [PATCH v4 23/42] tests/acpi: allow CEDT table addition, Jonathan Cameron, 2022/01/24
- [PATCH v4 24/42] acpi/cxl: Create the CEDT (9.14.1), Jonathan Cameron, 2022/01/24
- [PATCH v4 25/42] hw/cxl/device: Add some trivial commands, Jonathan Cameron, 2022/01/24
- [PATCH v4 26/42] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing, Jonathan Cameron, 2022/01/24
- [PATCH v4 27/42] hw/cxl/device: Implement get/set Label Storage Area (LSA), Jonathan Cameron, 2022/01/24
- [PATCH v4 28/42] hw/cxl/component: Add utils for interleave parameter encoding/decoding, Jonathan Cameron, 2022/01/24
- [PATCH v4 29/42] hw/cxl/host: Add support for CXL Fixed Memory Windows., Jonathan Cameron, 2022/01/24
- [PATCH v4 30/42] acpi/cxl: Introduce CFMWS structures in CEDT, Jonathan Cameron, 2022/01/24
- [PATCH v4 31/42] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl, Jonathan Cameron, 2022/01/24
[PATCH v4 32/42] pci/pcie_port: Add pci_find_port_by_pn(), Jonathan Cameron, 2022/01/24
[PATCH v4 33/42] CXL/cxl_component: Add cxl_get_hb_cstate(), Jonathan Cameron, 2022/01/24
[PATCH v4 34/42] mem/cxl_type3: Add read and write functions for associated hostmem., Jonathan Cameron, 2022/01/24