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[PULL 21/32] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes t
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From: |
Peter Maydell |
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Subject: |
[PULL 21/32] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER |
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Date: |
Fri, 28 Jan 2022 15:29:58 +0000 |
The ITS specification says that when the guest writes to GITS_CBASER
this causes GITS_CREADR to be cleared. However it does not have an
equivalent clause for GITS_CWRITER. (This is because GITS_CREADR is
read-only, but GITS_CWRITER is writable and the guest can initialize
it.) Remove the code that clears GITS_CWRITER on GITS_CBASER writes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220122182444.724087-6-peter.maydell@linaro.org
---
hw/intc/arm_gicv3_its.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 1763ba4a671..d9ff7b88492 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -866,7 +866,6 @@ static bool its_writel(GICv3ITSState *s, hwaddr offset,
if (!(s->ctlr & R_GITS_CTLR_ENABLED_MASK)) {
s->cbaser = deposit64(s->cbaser, 0, 32, value);
s->creadr = 0;
- s->cwriter = s->creadr;
}
break;
case GITS_CBASER + 4:
@@ -877,7 +876,6 @@ static bool its_writel(GICv3ITSState *s, hwaddr offset,
if (!(s->ctlr & R_GITS_CTLR_ENABLED_MASK)) {
s->cbaser = deposit64(s->cbaser, 32, 32, value);
s->creadr = 0;
- s->cwriter = s->creadr;
}
break;
case GITS_CWRITER:
@@ -1027,7 +1025,6 @@ static bool its_writell(GICv3ITSState *s, hwaddr offset,
if (!(s->ctlr & R_GITS_CTLR_ENABLED_MASK)) {
s->cbaser = value;
s->creadr = 0;
- s->cwriter = s->creadr;
}
break;
case GITS_CWRITER:
--
2.25.1
- [PULL 25/32] hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported, (continued)
- [PULL 25/32] hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported, Peter Maydell, 2022/01/28
- [PULL 14/32] MAINTAINERS: Add an entry for Xilinx Versal OSPI, Peter Maydell, 2022/01/28
- [PULL 10/32] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller, Peter Maydell, 2022/01/28
- [PULL 13/32] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI, Peter Maydell, 2022/01/28
- [PULL 31/32] hw/arm: ast2600: Fix address mapping of second SPI controller, Peter Maydell, 2022/01/28
- [PULL 15/32] MAINTAINERS: Remove myself (for raspi)., Peter Maydell, 2022/01/28
- [PULL 11/32] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model, Peter Maydell, 2022/01/28
- [PULL 20/32] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set, Peter Maydell, 2022/01/28
- [PULL 26/32] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops, Peter Maydell, 2022/01/28
- [PULL 03/32] hw/char/exynos4210_uart: Fix crash on trying to load VM state, Peter Maydell, 2022/01/28
- [PULL 21/32] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER,
Peter Maydell <=
- [PULL 08/32] include/hw/dma/xlnx_csu_dma: Add in missing includes in the header, Peter Maydell, 2022/01/28
- [PULL 18/32] hw/intc/arm_gicv3_its: Add tracepoints, Peter Maydell, 2022/01/28
- [PULL 22/32] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs, Peter Maydell, 2022/01/28
- [PULL 19/32] hw/intc/arm_gicv3: Initialise dma_as in GIC, not ITS, Peter Maydell, 2022/01/28
- [PULL 32/32] target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp, Peter Maydell, 2022/01/28
- [PULL 30/32] hw/intc/arm_gicv3_its: Implement MOVI, Peter Maydell, 2022/01/28
- [PULL 28/32] hw/intc/arm_gicv3_its: Check table bounds against correct limit, Peter Maydell, 2022/01/28
- [PULL 02/32] hw/armv7m: Fix broken VMStateDescription, Peter Maydell, 2022/01/28
- [PULL 05/32] hw/misc: Add a model of Versal's PMC SLCR, Peter Maydell, 2022/01/28
- [PULL 29/32] hw/intc/arm_gicv3_its: Implement MOVALL, Peter Maydell, 2022/01/28