Re: [PATCH] target/nios2: Shadow register set, EIC and VIC

[Peter Maydell]

On Sun, 20 Feb 2022 at 13:07, <amir.gonnen@neuroblade.ai> wrote:
>
> From 99efcd655e83f034bce25271fe592d8789529e54 Mon Sep 17 00:00:00 2001
> From: Amir Gonnen <amir.gonnen@neuroblade.ai>
> Date: Thu, 17 Feb 2022 15:43:14 +0200
> Subject: [PATCH] target/nios2: Shadow register set, EIC and VIC
>
> Implement nios2 Vectored Interrupt Controller (VIC).
> This includes Exteral Interrupt Controller interface (EIC) and Shadow
> Register set implementation on the nios2 cpu.
> Implemented missing wrprs and rdprs instructions, and fixed eret.
> Added intc_present property, true by default. When set to false, nios2
> uses the EIC interface when handling IRQ.

Hi; this patch seems to be trying to fix multiple things
at once. Could you split it up into a multi-patch patch series,
where each patch does one logical thing, please? In particular
bug fixes to existing code ("fixed eret") should be their
own patches, separate from patches adding new features.

> To use VIC, the nios2 board should set VIC cpu property, disable
> intc_present, connect VIC irq to cpu and connect VIC gpios.

Is there a patch which wires up one of the nios2 boards to do this ?

https://www.qemu.org/docs/master/devel/submitting-a-patch.html
is our guidelines on patch formatting.

thanks
-- PMM