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[PULL 04/26] hvf: arm: Handle unknown ID registers as RES0
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From: |
Peter Maydell |
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Subject: |
[PULL 04/26] hvf: arm: Handle unknown ID registers as RES0 |
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Date: |
Mon, 21 Feb 2022 09:27:38 +0000 |
From: Alexander Graf <agraf@csgraf.de>
Recent Linux versions added support to read ID_AA64ISAR2_EL1. On M1,
those reads trap into QEMU which handles them as faults.
However, AArch64 ID registers should always read as RES0. Let's
handle them accordingly.
This fixes booting Linux 5.17 guests.
Cc: qemu-stable@nongnu.org
Reported-by: Ivan Babrou <ivan@cloudflare.com>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-id: 20220209124135.69183-2-agraf@csgraf.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/hvf/hvf.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 808c96da8cc..4d4ddab348a 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -754,6 +754,15 @@ static bool hvf_handle_psci_call(CPUState *cpu)
return true;
}
+static bool is_id_sysreg(uint32_t reg)
+{
+ return SYSREG_OP0(reg) == 3 &&
+ SYSREG_OP1(reg) == 0 &&
+ SYSREG_CRN(reg) == 0 &&
+ SYSREG_CRM(reg) >= 1 &&
+ SYSREG_CRM(reg) < 8;
+}
+
static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint32_t rt)
{
ARMCPU *arm_cpu = ARM_CPU(cpu);
@@ -806,6 +815,11 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg,
uint32_t rt)
/* Dummy register */
break;
default:
+ if (is_id_sysreg(reg)) {
+ /* ID system registers read as RES0 */
+ val = 0;
+ break;
+ }
cpu_synchronize_state(cpu);
trace_hvf_unhandled_sysreg_read(env->pc, reg,
SYSREG_OP0(reg),
--
2.25.1
- [PULL 00/26] target-arm queue, Peter Maydell, 2022/02/21
- [PULL 01/26] MAINTAINERS: Adding myself as a reviewer of some components, Peter Maydell, 2022/02/21
- [PULL 02/26] tests/qtest: add qtests for npcm7xx sdhci, Peter Maydell, 2022/02/21
- [PULL 03/26] hvf: arm: Use macros for sysreg shift/masking, Peter Maydell, 2022/02/21
- [PULL 04/26] hvf: arm: Handle unknown ID registers as RES0,
Peter Maydell <=
- [PULL 07/26] target/arm: Move '-cpu host' code to cpu64.c, Peter Maydell, 2022/02/21
- [PULL 06/26] checkpatch: Ensure that TypeInfos are const, Peter Maydell, 2022/02/21
- [PULL 08/26] target/arm: Use aarch64_cpu_register() for 'host' CPU type, Peter Maydell, 2022/02/21
- [PULL 12/26] target/arm: Support PAuth extension for hvf, Peter Maydell, 2022/02/21
- [PULL 05/26] Mark remaining global TypeInfo instances as const, Peter Maydell, 2022/02/21
- [PULL 09/26] target/arm: Make KVM -cpu max exactly like -cpu host, Peter Maydell, 2022/02/21
- [PULL 11/26] target/arm: Fix '-cpu max' for HVF, Peter Maydell, 2022/02/21
- [PULL 14/26] Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus, Peter Maydell, 2022/02/21
- [PULL 13/26] Kconfig: Add I2C_DEVICES device group, Peter Maydell, 2022/02/21
- [PULL 10/26] target/arm: Unindent unnecessary else-clause, Peter Maydell, 2022/02/21