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[PATCH v2 12/12] macio/pmu.c: remove redundant code
From: |
Mark Cave-Ayland |
Subject: |
[PATCH v2 12/12] macio/pmu.c: remove redundant code |
Date: |
Thu, 24 Feb 2022 11:59:56 +0000 |
Now that the logic related to edge-triggered interrupts is all contained within
the mos6522 device the redundant implementation for the mac99 PMU device can
be removed.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/misc/macio/pmu.c | 33 ---------------------------------
include/hw/misc/macio/pmu.h | 2 --
2 files changed, 35 deletions(-)
diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c
index 5b1ec100e2..336502a84b 100644
--- a/hw/misc/macio/pmu.c
+++ b/hw/misc/macio/pmu.c
@@ -57,19 +57,6 @@
#define VIA_TIMER_FREQ (4700000 / 6)
-static void via_update_irq(PMUState *s)
-{
- MOS6522PMUState *mps = MOS6522_PMU(&s->mos6522_pmu);
- MOS6522State *ms = MOS6522(mps);
-
- bool new_state = !!(ms->ifr & ms->ier & (SR_INT | T1_INT | T2_INT));
-
- if (new_state != s->via_irq_state) {
- s->via_irq_state = new_state;
- qemu_set_irq(s->via_irq, new_state);
- }
-}
-
static void via_set_sr_int(void *opaque)
{
PMUState *s = opaque;
@@ -808,28 +795,9 @@ static void mos6522_pmu_portB_write(MOS6522State *s)
MOS6522PMUState *mps = container_of(s, MOS6522PMUState, parent_obj);
PMUState *ps = container_of(mps, PMUState, mos6522_pmu);
- if ((s->pcr & 0xe0) == 0x20 || (s->pcr & 0xe0) == 0x60) {
- s->ifr &= ~CB2_INT;
- }
- s->ifr &= ~CB1_INT;
-
- via_update_irq(ps);
pmu_update(ps);
}
-static void mos6522_pmu_portA_write(MOS6522State *s)
-{
- MOS6522PMUState *mps = container_of(s, MOS6522PMUState, parent_obj);
- PMUState *ps = container_of(mps, PMUState, mos6522_pmu);
-
- if ((s->pcr & 0x0e) == 0x02 || (s->pcr & 0x0e) == 0x06) {
- s->ifr &= ~CA2_INT;
- }
- s->ifr &= ~CA1_INT;
-
- via_update_irq(ps);
-}
-
static void mos6522_pmu_reset(DeviceState *dev)
{
MOS6522State *ms = MOS6522(dev);
@@ -853,7 +821,6 @@ static void mos6522_pmu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, mos6522_pmu_reset,
&mdc->parent_reset);
mdc->portB_write = mos6522_pmu_portB_write;
- mdc->portA_write = mos6522_pmu_portA_write;
}
static const TypeInfo mos6522_pmu_type_info = {
diff --git a/include/hw/misc/macio/pmu.h b/include/hw/misc/macio/pmu.h
index 78237d99a2..00fcdd23f5 100644
--- a/include/hw/misc/macio/pmu.h
+++ b/include/hw/misc/macio/pmu.h
@@ -193,8 +193,6 @@ struct PMUState {
MemoryRegion mem;
uint64_t frequency;
- qemu_irq via_irq;
- bool via_irq_state;
/* PMU state */
MOS6522PMUState mos6522_pmu;
--
2.20.1
- [PATCH v2 04/12] mos6522: switch over to use qdev gpios for IRQs, (continued)
- [PATCH v2 04/12] mos6522: switch over to use qdev gpios for IRQs, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 08/12] mos6522: add "info via" HMP command for debugging, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 09/12] mos6522: record last_irq_levels in mos6522_set_irq(), Mark Cave-Ayland, 2022/02/24
- [PATCH v2 03/12] mac_via: use IFR bit flag constants for VIA2 IRQs, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 07/12] mos6522: add register names to register read/write trace events, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 10/12] mac_via: make SCSI_DATA (DRQ) bit live rather than latched, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 11/12] mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQs, Mark Cave-Ayland, 2022/02/24
- [PATCH v2 12/12] macio/pmu.c: remove redundant code,
Mark Cave-Ayland <=