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[PATCH v4 06/33] target/nios2: Do not create TCGv for control registers
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From: |
Richard Henderson |
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Subject: |
[PATCH v4 06/33] target/nios2: Do not create TCGv for control registers |
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Date: |
Mon, 7 Mar 2022 21:19:38 -1000 |
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/nios2/translate.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index fe21bf45af..cefdcea81e 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -103,7 +103,7 @@ typedef struct DisasContext {
int mem_idx;
} DisasContext;
-static TCGv cpu_R[NUM_CORE_REGS];
+static TCGv cpu_R[NUM_GP_REGS];
static TCGv cpu_pc;
typedef struct Nios2Instruction {
@@ -453,6 +453,7 @@ static void callr(DisasContext *dc, uint32_t code, uint32_t
flags)
static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags)
{
R_TYPE(instr, code);
+ TCGv t1, t2;
if (!gen_check_supervisor(dc)) {
return;
@@ -472,10 +473,19 @@ static void rdctl(DisasContext *dc, uint32_t code,
uint32_t flags)
* must perform the AND here, and anywhere else we need the
* guest value of ipending.
*/
- tcg_gen_and_tl(cpu_R[instr.c], cpu_R[CR_IPENDING], cpu_R[CR_IENABLE]);
+ t1 = tcg_temp_new();
+ t2 = tcg_temp_new();
+ tcg_gen_ld_tl(t1, cpu_env,
+ offsetof(CPUNios2State, regs[CR_IPENDING]));
+ tcg_gen_ld_tl(t2, cpu_env,
+ offsetof(CPUNios2State, regs[CR_IENABLE]));
+ tcg_gen_and_tl(cpu_R[instr.c], t1, t2);
+ tcg_temp_free(t1);
+ tcg_temp_free(t2);
break;
default:
- tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]);
+ tcg_gen_ld_tl(cpu_R[instr.c], cpu_env,
+ offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE]));
break;
}
}
@@ -512,7 +522,8 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t
flags)
dc->base.is_jmp = DISAS_UPDATE;
/* fall through */
default:
- tcg_gen_mov_tl(cpu_R[instr.imm5 + CR_BASE], v);
+ tcg_gen_st_tl(v, cpu_env,
+ offsetof(CPUNios2State, regs[instr.imm5 + CR_BASE]));
break;
}
#endif
@@ -900,7 +911,7 @@ void nios2_tcg_init(void)
{
int i;
- for (i = 0; i < NUM_CORE_REGS; i++) {
+ for (i = 0; i < NUM_GP_REGS; i++) {
cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUNios2State, regs[i]),
regnames[i]);
--
2.25.1
- [PATCH v4 00/33] target/nios2: Shadow register set, EIC and VIC, Richard Henderson, 2022/03/08
- [PATCH v4 06/33] target/nios2: Do not create TCGv for control registers,
Richard Henderson <=
- [PATCH v4 01/33] target/nios2: Check supervisor on eret, Richard Henderson, 2022/03/08
- [PATCH v4 02/33] target/nios2: Stop generating code if gen_check_supervisor fails, Richard Henderson, 2022/03/08
- [PATCH v4 03/33] target/nios2: Add NUM_GP_REGS and NUM_CP_REGS, Richard Henderson, 2022/03/08
- [PATCH v4 07/33] linux-user/nios2: Trim target_pc_regs to sp and pc, Richard Henderson, 2022/03/08
- [PATCH v4 08/33] target/nios2: Remove cpu_interrupts_enabled, Richard Henderson, 2022/03/08