Re: [PATCH qemu 01/13] target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed

[Weiwei Li]

在 2022/3/14 下午3:38, ~eopxd 写道:
> From: eopXD <eop.chen@sifive.com>
>
> No functional change intended in this commit.
>
> Signed-off-by: eop Chen <eop.chen@sifive.com>
> Reviewed-by: Frank Chang <frank.chang@sifive.com>
> ---
>   target/riscv/vector_helper.c | 1132 +++++++++++++++++-----------------
>   1 file changed, 565 insertions(+), 567 deletions(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 3bd4aac9c9..e94caf1a3c 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -710,7 +710,6 @@ RVVCALL(OPIVV2, vsub_vv_d, OP_SSS_D, H8, H8, H8, DO_SUB)
>   
>   static void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2,
>                          CPURISCVState *env, uint32_t desc,
> -                       uint32_t esz, uint32_t dsz,
>                          opivv2_fn *fn)
>   {
>       uint32_t vm = vext_vm(desc);
> @@ -727,23 +726,23 @@ static void do_vext_vv(void *vd, void *v0, void *vs1, 
> void *vs2,
>   }
>   
>   /* generate the helpers for OPIVV */
> -#define GEN_VEXT_VV(NAME, ESZ, DSZ)                       \
> +#define GEN_VEXT_VV(NAME)                                 \
>   void HELPER(NAME)(void *vd, void *v0, void *vs1,          \
>                     void *vs2, CPURISCVState *env,          \
>                     uint32_t desc)                          \
>   {                                                         \
> -    do_vext_vv(vd, v0, vs1, vs2, env, desc, ESZ, DSZ,     \
> +    do_vext_vv(vd, v0, vs1, vs2, env, desc,               \
>                  do_##NAME);                                \
>   }
>   

ESZ can be used in the later patches. Maybe it's better to move this 
patch to  last  and prune redundant DSZ parameter.

Regards,

Weiwei Li