Re: [RFC PATCH 6/6] target/ppc: implement xscvqp[su]qz

[Richard Henderson]

On 3/28/22 14:14, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> Implement the following PowerISA v3.1 instructions:
> xscvqpsqz: VSX Scalar Convert with round to zero Quad-Precision to
>             Signed Quadword
> xscvqpuqz: VSX Scalar Convert with round to zero Quad-Precision to
>             Unsigned Quadword
>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
>   target/ppc/fpu_helper.c             | 23 +++++++++++++++++++++++
>   target/ppc/helper.h                 |  2 ++
>   target/ppc/insn32.decode            |  2 ++
>   target/ppc/translate/vsx-impl.c.inc |  2 ++
>   4 files changed, 29 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~