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[PULL 12/19] target/m68k: Implement TRAPcc
From: |
Laurent Vivier |
Subject: |
[PULL 12/19] target/m68k: Implement TRAPcc |
Date: |
Thu, 2 Jun 2022 13:58:30 +0200 |
From: Richard Henderson <richard.henderson@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/754
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-11-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 2 ++
linux-user/m68k/cpu_loop.c | 1 +
target/m68k/cpu.c | 1 +
target/m68k/op_helper.c | 6 +----
target/m68k/translate.c | 49 ++++++++++++++++++++++++++++++++++++++
5 files changed, 54 insertions(+), 5 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 558c3c67d607..4d8f48e8c747 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -534,6 +534,8 @@ enum m68k_features {
M68K_FEATURE_MOVEC,
/* Unaligned data accesses (680[2346]0) */
M68K_FEATURE_UNALIGNED_DATA,
+ /* TRAPcc insn. (680[2346]0, and CPU32) */
+ M68K_FEATURE_TRAPCC,
};
static inline int m68k_feature(CPUM68KState *env, int feature)
diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c
index fcf92205529e..3d3033155f69 100644
--- a/linux-user/m68k/cpu_loop.c
+++ b/linux-user/m68k/cpu_loop.c
@@ -47,6 +47,7 @@ void cpu_loop(CPUM68KState *env)
force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc);
break;
case EXCP_CHK:
+ case EXCP_TRAPCC:
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar);
break;
case EXCP_DIV0:
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 567106792377..5bbefda5752d 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -158,6 +158,7 @@ static void m68020_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CHK2);
m68k_set_feature(env, M68K_FEATURE_MSP);
m68k_set_feature(env, M68K_FEATURE_UNALIGNED_DATA);
+ m68k_set_feature(env, M68K_FEATURE_TRAPCC);
}
/*
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index aa62158eb97b..61948d92bb25 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -399,14 +399,10 @@ static void m68k_interrupt_all(CPUM68KState *env, int
is_hw)
do_stack_frame(env, &sp, 2, oldsr, 0, env->pc);
break;
- case EXCP_TRAPCC:
- /* FIXME: addr is not only env->pc */
- do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc);
- break;
-
case EXCP_CHK:
case EXCP_DIV0:
case EXCP_TRACE:
+ case EXCP_TRAPCC:
do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc);
break;
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 38b72d282aa6..e9aa96d7684b 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4879,6 +4879,53 @@ DISAS_INSN(trap)
gen_exception(s, s->pc, EXCP_TRAP0 + (insn & 0xf));
}
+static void do_trapcc(DisasContext *s, DisasCompare *c)
+{
+ if (c->tcond != TCG_COND_NEVER) {
+ TCGLabel *over = NULL;
+
+ update_cc_op(s);
+
+ if (c->tcond != TCG_COND_ALWAYS) {
+ /* Jump over if !c. */
+ over = gen_new_label();
+ tcg_gen_brcond_i32(tcg_invert_cond(c->tcond), c->v1, c->v2, over);
+ }
+
+ tcg_gen_movi_i32(QREG_PC, s->pc);
+ gen_raise_exception_format2(s, EXCP_TRAPCC, s->base.pc_next);
+
+ if (over != NULL) {
+ gen_set_label(over);
+ s->base.is_jmp = DISAS_NEXT;
+ }
+ }
+ free_cond(c);
+}
+
+DISAS_INSN(trapcc)
+{
+ DisasCompare c;
+
+ /* Consume and discard the immediate operand. */
+ switch (extract32(insn, 0, 3)) {
+ case 2: /* trapcc.w */
+ (void)read_im16(env, s);
+ break;
+ case 3: /* trapcc.l */
+ (void)read_im32(env, s);
+ break;
+ case 4: /* trapcc (no operand) */
+ break;
+ default:
+ /* trapcc registered with only valid opmodes */
+ g_assert_not_reached();
+ }
+
+ gen_cc_cond(&c, s, extract32(insn, 8, 4));
+ do_trapcc(s, &c);
+}
+
static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
{
switch (reg) {
@@ -6051,6 +6098,8 @@ void register_m68k_insns (CPUM68KState *env)
INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */
INSN(scc, 50c0, f0c0, M68000); /* Scc.B <EA> */
INSN(dbcc, 50c8, f0f8, M68000);
+ INSN(trapcc, 50fa, f0fe, TRAPCC); /* opmode 010, 011 */
+ INSN(trapcc, 50fc, f0ff, TRAPCC); /* opmode 100 */
INSN(tpf, 51f8, fff8, CF_ISA_A);
/* Branch instructions. */
--
2.36.1
- [PULL 00/19] M68k for 7.1 patches, Laurent Vivier, 2022/06/02
- [PULL 01/19] target/m68k: Clear mach in m68k_cpu_disas_set_info, Laurent Vivier, 2022/06/02
- [PULL 02/19] target/m68k: Enable halt insn for 68060, Laurent Vivier, 2022/06/02
- [PULL 06/19] linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15, Laurent Vivier, 2022/06/02
- [PULL 04/19] target/m68k: Switch over exception type in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 03/19] target/m68k: Raise the TRAPn exception with the correct pc, Laurent Vivier, 2022/06/02
- [PULL 07/19] target/m68k: Remove retaddr in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 08/19] target/m68k: Fix address argument for EXCP_CHK, Laurent Vivier, 2022/06/02
- [PULL 18/19] linux-user/strace: Adjust get_thread_area for m68k, Laurent Vivier, 2022/06/02
- [PULL 12/19] target/m68k: Implement TRAPcc,
Laurent Vivier <=
- [PULL 14/19] target/m68k: Implement TRAPV, Laurent Vivier, 2022/06/02
- [PULL 15/19] target/m68k: Implement FTRAPcc, Laurent Vivier, 2022/06/02
- [PULL 16/19] tests/tcg/m68k: Add trap.c, Laurent Vivier, 2022/06/02
- [PULL 09/19] target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0, Laurent Vivier, 2022/06/02
- [PULL 11/19] target/m68k: Fix stack frame for EXCP_ILLEGAL, Laurent Vivier, 2022/06/02
- [PULL 05/19] target/m68k: Fix coding style in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 10/19] target/m68k: Fix address argument for EXCP_TRACE, Laurent Vivier, 2022/06/02
- [PULL 13/19] target/m68k: Implement TPF in terms of TRAPcc, Laurent Vivier, 2022/06/02
- [PULL 17/19] linux-user/strace: Use is_error in print_syscall_err, Laurent Vivier, 2022/06/02
- [PULL 19/19] target/m68k: Mark helper_raise_exception as noreturn, Laurent Vivier, 2022/06/02