Re: [RFC PATCH v2] RISC-V: Add Zawrs ISA extension support

[Philipp Tomsich]

On Thu, 2 Jun 2022 at 17:07, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/2/22 06:40, Christoph Muellner wrote:
> > diff --git a/target/riscv/insn_trans/trans_rvzawrs.c.inc 
> > b/target/riscv/insn_trans/trans_rvzawrs.c.inc
> > new file mode 100644
> > index 0000000000..38b71d0085
> > --- /dev/null
> > +++ b/target/riscv/insn_trans/trans_rvzawrs.c.inc
>
> Typo in the filename -- s/rvz/rz/.

z = standard extension
a = atomics family
wrs = extension name

The full extension name indeed is Zawrs (see also
https://wiki.riscv.org/display/HOME/Specification+Status).

> > +#define REQUIRE_ZAWRS(ctx) do {         \
> > +    if (!ctx->cfg_ptr->ext_zawrs) {     \
> > +        return false;                   \
> > +    }                                   \
> > +} while (0)
> > +
> > +static bool trans_wrs(DisasContext *ctx, arg_sfence_vm *a)
> > +{
> > +    REQUIRE_ZAWRS(ctx);
>
> No point in the macro for what will only ever be a single user.
>
> Otherwise, the implementation looks correct.
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~