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[PULL 31/55] target/arm: Move regime_ttbr to ptw.c
From: |
Peter Maydell |
Subject: |
[PULL 31/55] target/arm: Move regime_ttbr to ptw.c |
Date: |
Thu, 9 Jun 2022 10:05:13 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-25-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/ptw.h | 1 -
target/arm/helper.c | 16 ----------------
target/arm/ptw.c | 16 ++++++++++++++++
3 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/target/arm/ptw.h b/target/arm/ptw.h
index 3d3061a4351..ed152ddaf4e 100644
--- a/target/arm/ptw.h
+++ b/target/arm/ptw.h
@@ -12,7 +12,6 @@
#ifndef CONFIG_USER_ONLY
bool regime_translation_disabled(CPUARMState *env, ARMMMUIdx mmu_idx);
-uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn);
#endif /* !CONFIG_USER_ONLY */
#endif /* TARGET_ARM_PTW_H */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8deb0fa94c1..fdda87e87e2 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10475,22 +10475,6 @@ bool regime_translation_disabled(CPUARMState *env,
ARMMMUIdx mmu_idx)
return (regime_sctlr(env, mmu_idx) & SCTLR_M) == 0;
}
-/* Return the TTBR associated with this translation regime */
-uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn)
-{
- if (mmu_idx == ARMMMUIdx_Stage2) {
- return env->cp15.vttbr_el2;
- }
- if (mmu_idx == ARMMMUIdx_Stage2_S) {
- return env->cp15.vsttbr_el2;
- }
- if (ttbrn == 0) {
- return env->cp15.ttbr0_el[regime_el(env, mmu_idx)];
- } else {
- return env->cp15.ttbr1_el[regime_el(env, mmu_idx)];
- }
-}
-
/* Convert a possible stage1+2 MMU index into the appropriate
* stage 1 MMU index
*/
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 8db4b5edf1a..dc559e6bdfd 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -75,6 +75,22 @@ static bool regime_is_user(CPUARMState *env, ARMMMUIdx
mmu_idx)
}
}
+/* Return the TTBR associated with this translation regime */
+static uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn)
+{
+ if (mmu_idx == ARMMMUIdx_Stage2) {
+ return env->cp15.vttbr_el2;
+ }
+ if (mmu_idx == ARMMMUIdx_Stage2_S) {
+ return env->cp15.vsttbr_el2;
+ }
+ if (ttbrn == 0) {
+ return env->cp15.ttbr0_el[regime_el(env, mmu_idx)];
+ } else {
+ return env->cp15.ttbr1_el[regime_el(env, mmu_idx)];
+ }
+}
+
static bool ptw_attrs_are_device(CPUARMState *env, ARMCacheAttrs cacheattrs)
{
/*
--
2.25.1
- [PULL 13/55] target/arm: Move get_phys_addr_pmsav7_default to ptw.c, (continued)
- [PULL 13/55] target/arm: Move get_phys_addr_pmsav7_default to ptw.c, Peter Maydell, 2022/06/09
- [PULL 16/55] target/arm: Move pmsav8_mpu_lookup to ptw.c, Peter Maydell, 2022/06/09
- [PULL 20/55] target/arm: Move get_level1_table_address to ptw.c, Peter Maydell, 2022/06/09
- [PULL 22/55] target/arm: Move get_phys_addr_lpae to ptw.c, Peter Maydell, 2022/06/09
- [PULL 32/55] target/arm: Move regime_translation_disabled to ptw.c, Peter Maydell, 2022/06/09
- [PULL 07/55] xlnx-zynqmp: fix the irq mapping for the display port and its dma, Peter Maydell, 2022/06/09
- [PULL 14/55] target/arm: Move get_phys_addr_pmsav7 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 18/55] target/arm: Move v8m_security_lookup to ptw.c, Peter Maydell, 2022/06/09
- [PULL 25/55] target/arm: Move arm_pamax, pamax_map into ptw.c, Peter Maydell, 2022/06/09
- [PULL 23/55] target/arm: Move arm_{ldl,ldq}_ptw to ptw.c, Peter Maydell, 2022/06/09
- [PULL 31/55] target/arm: Move regime_ttbr to ptw.c,
Peter Maydell <=
- [PULL 29/55] target/arm: Move ap_to_tw_prot etc to ptw.c, Peter Maydell, 2022/06/09
- [PULL 24/55] target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c, Peter Maydell, 2022/06/09
- [PULL 34/55] target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c, Peter Maydell, 2022/06/09
- [PULL 38/55] target/arm: Remove route_to_el2 check from sve_exception_el, Peter Maydell, 2022/06/09
- [PULL 41/55] target/arm: Use el_is_in_host for sve_zcr_len_for_el, Peter Maydell, 2022/06/09
- [PULL 04/55] xlnx_dp: fix the wrong register size, Peter Maydell, 2022/06/09
- [PULL 15/55] target/arm: Move get_phys_addr_pmsav8 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 19/55] target/arm: Move m_is_{ppb,system}_region to ptw.c, Peter Maydell, 2022/06/09
- [PULL 21/55] target/arm: Move combine_cacheattrs and subroutines to ptw.c, Peter Maydell, 2022/06/09
- [PULL 27/55] target/arm: Move check_s2_mmu_setup to ptw.c, Peter Maydell, 2022/06/09