[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 0/2] Cavium Octeon MIPS extensions
From: |
Pavel Dovgalyuk |
Subject: |
[PATCH v3 0/2] Cavium Octeon MIPS extensions |
Date: |
Mon, 20 Jun 2022 15:04:44 +0300 |
User-agent: |
StGit/0.23 |
The following series includes emulation of the platform-specific MIPS extension
for Cavium Octeon CPUS:
- basic Octeon vCPU model
- custom instruction decoder for Octeon
- implementation of arithmetic and logic instructions
v3 changes:
- separated vCPU model definition and decodetree for Octeon
(suggested by Philippe Mathieu-Daudé)
- fixed length field for EXTS/CINS (bug found by Richard Henderson)
v2 changes:
- simplified instruction decoding and translation (suggested by Richard
Henderson)
---
Pavel Dovgalyuk (2):
target/mips: introduce Cavium Octeon CPU model
target/mips: implement Octeon-specific arithmetic instructions
target/mips/cpu-defs.c.inc | 28 ----------------------------
1 file changed, 28 deletions(-)
--
Pavel Dovgalyuk
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [PATCH v3 0/2] Cavium Octeon MIPS extensions,
Pavel Dovgalyuk <=