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From: | Pierre Morel |
Subject: | Re: [PATCH v8 03/12] s390x/cpu_topology: implementating Store Topology System Information |
Date: | Tue, 28 Jun 2022 13:03:40 +0200 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 |
On 6/27/22 16:26, Janosch Frank wrote:
On 6/20/22 16:03, Pierre Morel wrote: s390x/cpu_topology: Add STSI function code 15 handling
OK
The handling of STSI is enhanced with the interception of the function code 15 for storing CPU topology.s/interception/handling/
OK
Using the objects built during the plugging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2 will be built. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>+void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) +{ + const MachineState *machine = MACHINE(qdev_get_machine()); + void *p; + int ret; + + /* + * Until the SCLP STSI Facility reporting the MNEST value is used, + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. + */ + if (sel2 != 2) { + setcc(cpu, 3); + return; + } + + p = g_malloc0(TARGET_PAGE_SIZE); + + setup_stsi(machine, p, 2); + + if (s390_is_pv()) { + ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); + } else {+ ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, TARGET_PAGE_SIZE);+ }For later reference: FCs over 3 are rejected by SIE for PV guests via cc 3.I currently don't know if and when that will be changed but I'll ask around.
Yes, thanks, I forgot to change that, will do. -- Pierre Morel IBM Lab Boeblingen
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