[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 21/24] disas/nanomips: Replace exception handling
From: |
Milica Lazarevic |
Subject: |
[PATCH v3 21/24] disas/nanomips: Replace exception handling |
Date: |
Mon, 12 Sep 2022 14:26:32 +0200 |
Since there's no support for exception handling in C, the try-catch
blocks have been deleted, and throw clauses are replaced. When a runtime
error happens, we're printing out the error message. Disassembling of
the current instruction interrupts. This behavior is achieved by adding
sigsetjmp() to discard further disassembling after the error message
prints and by adding the siglongjmp() function to imitate throwing an
error. The goal was to maintain the same output as it was.
Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com>
---
disas/nanomips.cpp | 100 ++++++++++++++++++++-------------------------
1 file changed, 45 insertions(+), 55 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 077dfe0dea..0121d5da61 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -31,7 +31,6 @@
#include "disas/dis-asm.h"
#include <string.h>
-#include <stdexcept>
#include <stdio.h>
#include <stdarg.h>
@@ -133,10 +132,9 @@ static uint64 renumber_registers(uint64 index, uint64
*register_list,
return register_list[index];
}
- throw std::runtime_error(img_format(
- "Invalid register mapping index %" PRIu64
- ", size of list = %zu",
- index, register_list_size));
+ info->fprintf_func(info->stream, "Invalid register mapping index %" PRIu64
+ ", size of list = %zu", index, register_list_size);
+ siglongjmp(info->buf, 1);
}
@@ -466,8 +464,9 @@ static const char *GPR(uint64 reg, Dis_info *info)
return gpr_reg[reg];
}
- throw std::runtime_error(img_format("Invalid GPR register index %" PRIu64,
- reg));
+ info->fprintf_func(info->stream, "Invalid GPR register index %" PRIu64,
+ reg);
+ siglongjmp(info->buf, 1);
}
@@ -503,8 +502,9 @@ static const char *FPR(uint64 reg, Dis_info *info)
return fpr_reg[reg];
}
- throw std::runtime_error(img_format("Invalid FPR register index %" PRIu64,
- reg));
+ info->fprintf_func(info->stream, "Invalid FPR register index %" PRIu64,
+ reg);
+ siglongjmp(info->buf, 1);
}
@@ -518,8 +518,9 @@ static const char *AC(uint64 reg, Dis_info *info)
return ac_reg[reg];
}
- throw std::runtime_error(img_format("Invalid AC register index %" PRIu64,
- reg));
+ info->fprintf_func(info->stream, "Invalid AC register index %" PRIu64,
+ reg);
+ siglongjmp(info->buf, 1);
}
@@ -562,55 +563,38 @@ static int Disassemble(const uint16 *data, char **dis,
TABLE_ENTRY_TYPE & type, const Pool *table,
int table_size, Dis_info *info)
{
- try
- {
- for (int i = 0; i < table_size; i++) {
- uint64 op_code = extract_op_code_value(data,
- table[i].instructions_size);
- if ((op_code & table[i].mask) == table[i].value) {
- /* possible match */
- conditional_function cond = table[i].condition;
- if ((cond == NULL) || cond(op_code)) {
- try
- {
- if (table[i].type == pool) {
- return Disassemble(data, dis, type,
- table[i].next_table,
- table[i].next_table_size,
- info);
- } else if ((table[i].type == instruction) ||
- (table[i].type == call_instruction) ||
- (table[i].type == branch_instruction) ||
- (table[i].type == return_instruction)) {
- disassembly_function dis_fn = table[i].disassembly;
- if (dis_fn == 0) {
- *dis = g_strdup(
- "disassembler failure - bad table entry");
- return -6;
- }
- type = table[i].type;
- *dis = dis_fn(op_code, info);
- return table[i].instructions_size;
- } else {
- *dis = g_strdup("reserved instruction");
- return -2;
- }
- }
- catch (std::runtime_error & e)
- {
- *dis = g_strdup(e.what());
- return -3; /* runtime error */
+ for (int i = 0; i < table_size; i++) {
+ uint64 op_code = extract_op_code_value(data,
+ table[i].instructions_size);
+ if ((op_code & table[i].mask) == table[i].value) {
+ /* possible match */
+ conditional_function cond = table[i].condition;
+ if ((cond == NULL) || cond(op_code)) {
+ if (table[i].type == pool) {
+ return Disassemble(data, dis, type,
+ table[i].next_table,
+ table[i].next_table_size,
+ info);
+ } else if ((table[i].type == instruction) ||
+ (table[i].type == call_instruction) ||
+ (table[i].type == branch_instruction) ||
+ (table[i].type == return_instruction)) {
+ disassembly_function dis_fn = table[i].disassembly;
+ if (dis_fn == 0) {
+ *dis = g_strdup(
+ "disassembler failure - bad table entry");
+ return -6;
}
+ type = table[i].type;
+ *dis = dis_fn(op_code, info);
+ return table[i].instructions_size;
+ } else {
+ *dis = g_strdup("reserved instruction");
+ return -2;
}
}
}
}
- catch (std::exception & e)
- {
- *dis = g_strdup(e.what());
- return -4; /* runtime error */
- }
-
*dis = g_strdup("failed to disassemble");
return -1; /* failed to disassemble */
}
@@ -22004,6 +21988,12 @@ int print_insn_nanomips(bfd_vma memaddr, struct
disassemble_info *info)
(*info->fprintf_func)(info->stream, " ");
}
+ /* Handle runtime errors. */
+ if (sigsetjmp(disassm_info.buf, 0) != 0) {
+ info->insn_type = dis_noninsn;
+ return insn3 ? 6 : insn2 ? 4 : 2;
+ }
+
int length = nanomips_dis(&buf, &disassm_info, insn1, insn2, insn3);
/* FIXME: Should probably use a hash table on the major opcode here. */
--
2.25.1
- Re: [PATCH v3 16/24] disas/nanomips: Remove IMMEDIATE functions, (continued)
- [PATCH v3 17/24] disas/nanomips: Remove CPR function, Milica Lazarevic, 2022/09/12
- [PATCH v3 18/24] disas/nanomips: Prevent memory leaking, Milica Lazarevic, 2022/09/12
- [PATCH v3 19/24] disas/nanomips: Remove function overloading, Milica Lazarevic, 2022/09/12
- [PATCH v3 22/24] disas/nanomips: Replace Cpp enums for C enums, Milica Lazarevic, 2022/09/12
- [PATCH v3 20/24] disas/nanomips: Expand Dis_info struct, Milica Lazarevic, 2022/09/12
- [PATCH v3 21/24] disas/nanomips: Replace exception handling,
Milica Lazarevic <=
- [PATCH v3 23/24] disas/nanomips: Remove argument passing by ref, Milica Lazarevic, 2022/09/12
- [PATCH v3 24/24] disas/nanomips: Rename nanomips.cpp to nanomips.c, Milica Lazarevic, 2022/09/12