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[PATCH 1/8] target/loongarch: Enable the disassembler for host tcg
From: |
Richard Henderson |
Subject: |
[PATCH 1/8] target/loongarch: Enable the disassembler for host tcg |
Date: |
Mon, 5 Dec 2022 22:40:44 -0600 |
Reuse the decodetree based disassembler from
target/loongarch/ for tcg/loongarch64/.
The generation of decode-insns.c.inc into ./libcommon.fa.p/ could
eventually result in conflict, if any other host requires the same
trick, but this is good enough for now.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
disas.c | 2 ++
target/loongarch/meson.build | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/disas.c b/disas.c
index 94d3b45042..758824d749 100644
--- a/disas.c
+++ b/disas.c
@@ -198,6 +198,8 @@ static void initialize_debug_host(CPUDebug *s)
s->info.cap_insn_split = 6;
#elif defined(__hppa__)
s->info.print_insn = print_insn_hppa;
+#elif defined(__loongarch64)
+ s->info.print_insn = print_insn_loongarch;
#endif
}
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index 6376f9e84b..690633969f 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -3,7 +3,6 @@ gen = decodetree.process('insns.decode')
loongarch_ss = ss.source_set()
loongarch_ss.add(files(
'cpu.c',
- 'disas.c',
))
loongarch_tcg_ss = ss.source_set()
loongarch_tcg_ss.add(gen)
@@ -24,6 +23,8 @@ loongarch_softmmu_ss.add(files(
'iocsr_helper.c',
))
+common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
+
loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
target_arch += {'loongarch': loongarch_ss}
--
2.34.1
[PATCH 5/8] tcg/loongarch64: Improve setcond expansion, Richard Henderson, 2022/12/05
[PATCH 6/8] tcg/loongarch64: Implement movcond, Richard Henderson, 2022/12/05