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[PATCH v4 26/27] tcg/s390x: Cleanup tcg_out_movi
From: |
Richard Henderson |
Subject: |
[PATCH v4 26/27] tcg/s390x: Cleanup tcg_out_movi |
Date: |
Thu, 8 Dec 2022 20:05:29 -0600 |
Merge maybe_out_small_movi, as it no longer has additional users.
Use is_const_p{16,32}.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 52 ++++++++++++--------------------------
1 file changed, 16 insertions(+), 36 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 4d113139e5..b72c43e4aa 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -874,14 +874,19 @@ static bool tcg_out_mov(TCGContext *s, TCGType type,
TCGReg dst, TCGReg src)
return true;
}
-static const S390Opcode lli_insns[4] = {
+static const S390Opcode li_insns[4] = {
RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH
};
+static const S390Opcode lif_insns[2] = {
+ RIL_LLILF, RIL_LLIHF,
+};
-static bool maybe_out_small_movi(TCGContext *s, TCGType type,
- TCGReg ret, tcg_target_long sval)
+/* load a register with an immediate value */
+static void tcg_out_movi(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long sval)
{
tcg_target_ulong uval = sval;
+ ptrdiff_t pc_off;
int i;
if (type == TCG_TYPE_I32) {
@@ -892,36 +897,13 @@ static bool maybe_out_small_movi(TCGContext *s, TCGType
type,
/* Try all 32-bit insns that can load it in one go. */
if (sval >= -0x8000 && sval < 0x8000) {
tcg_out_insn(s, RI, LGHI, ret, sval);
- return true;
- }
-
- for (i = 0; i < 4; i++) {
- tcg_target_long mask = 0xffffull << i * 16;
- if ((uval & mask) == uval) {
- tcg_out_insn_RI(s, lli_insns[i], ret, uval >> i * 16);
- return true;
- }
- }
-
- return false;
-}
-
-/* load a register with an immediate value */
-static void tcg_out_movi(TCGContext *s, TCGType type,
- TCGReg ret, tcg_target_long sval)
-{
- tcg_target_ulong uval;
- ptrdiff_t pc_off;
-
- /* Try all 32-bit insns that can load it in one go. */
- if (maybe_out_small_movi(s, type, ret, sval)) {
return;
}
- uval = sval;
- if (type == TCG_TYPE_I32) {
- uval = (uint32_t)sval;
- sval = (int32_t)sval;
+ i = is_const_p16(uval);
+ if (i >= 0) {
+ tcg_out_insn_RI(s, li_insns[i], ret, uval >> (i * 16));
+ return;
}
/* Try all 48-bit insns that can load it in one go. */
@@ -929,12 +911,10 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
tcg_out_insn(s, RIL, LGFI, ret, sval);
return;
}
- if (uval <= 0xffffffff) {
- tcg_out_insn(s, RIL, LLILF, ret, uval);
- return;
- }
- if ((uval & 0xffffffff) == 0) {
- tcg_out_insn(s, RIL, LLIHF, ret, uval >> 32);
+
+ i = is_const_p32(uval);
+ if (i >= 0) {
+ tcg_out_insn_RIL(s, lif_insns[i], ret, uval >> (i * 32));
return;
}
--
2.34.1
- [PATCH v4 21/27] tcg/s390x: Generalize movcond implementation, (continued)
- [PATCH v4 21/27] tcg/s390x: Generalize movcond implementation, Richard Henderson, 2022/12/08
- [PATCH v4 22/27] tcg/s390x: Support SELGR instruction in movcond, Richard Henderson, 2022/12/08
- [PATCH v4 23/27] tcg/s390x: Use tgen_movcond_int in tgen_clz, Richard Henderson, 2022/12/08
- [PATCH v4 24/27] tcg/s390x: Implement ctpop operation, Richard Henderson, 2022/12/08
- [PATCH v4 25/27] tcg/s390x: Tighten constraints for 64-bit compare, Richard Henderson, 2022/12/08
- [PATCH v4 27/27] tcg/s390x: Avoid the constant pool in tcg_out_movi, Richard Henderson, 2022/12/08
- [PATCH v4 26/27] tcg/s390x: Cleanup tcg_out_movi,
Richard Henderson <=
- Re: [PATCH v4 00/27] tcg/s390x: misc patches, Ilya Leoshkevich, 2022/12/13