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Re: [PULL v2 00/28] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [PULL v2 00/28] target-arm queue |
Date: |
Fri, 16 Dec 2022 11:54:33 +0000 |
On Fri, 16 Dec 2022 at 11:49, Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > drop the sysregs patch as the tcg sysregs test fails
> > (probably a bug in the test)
>
> Well I assume because it complains about extra bits leaking into
> userspace:
>
> ➜ ./qemu-aarch64 ./tests/tcg/aarch64-linux-user/sysregs
> Checking Counter registers
> ctr_el0 : 0x0000000080038003
> cntvct_el0 : 0x017314376c668b73
> cntfrq_el0 : 0x0000000003b9aca0
> Checking CPUID registers
> id_aa64isar0_el1 : 0x1021111110212120
> !!extra bits!! : 0x1000000000000000
> id_aa64isar1_el1 : 0x0011101101211012
> !!extra bits!! : 0x0011100100000000
> id_aa64mmfr0_el1 : 0xffffffffff000000
> !!extra bits!! : 0xffffffff00000000
> id_aa64pfr0_el1 : 0x0001000100110011
> id_aa64pfr1_el1 : 0x0000000001000321
> !!extra bits!! : 0x0000000001000301
> id_aa64dfr0_el1 : 0x0000000000000006
> id_aa64zfr0_el1 : 0x0110110100110021 (not RAZ!)
> midr_el1 : 0x00000000000f0510
> mpidr_el1 : 0x0000000080000000
> Remaining registers should fail
> id_mmfr0_el1 : 0x00000000deadbeef
> id_mmfr1_el1 : 0x00000000deadbeef
> id_mmfr2_el1 : 0x00000000deadbeef
> id_mmfr3_el1 : 0x00000000deadbeef
> mvfr0_el1 : 0x00000000deadbeef
> mvfr1_el1 : 0x00000000deadbeef
> Extra information leaked to user-space!
>
> So it should have been updated when the API was changed.
Yes, exactly (or written in a way that supports "in future
we might expose more fields").
thanks
-- PMM