Re: [PATCH v2 3/3] hw/isa/piix4: Correct IRQRC[A:D] reset values

[Bernhard Beschow]

Am 27. Oktober 2022 20:47:20 UTC schrieb "Philippe Mathieu-Daudé" 
<philmd@linaro.org>:
>IRQRC[A:D] registers reset value is 0x80. We were forcing
>the MIPS Malta machine routing to be able to boot a Linux
>kernel without any bootloader.
>We now have these registers initialized in the Malta machine
>write_bootloader(), so we can use the correct reset values.
>
>Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>---

Reviewed-by: Bernhard Beschow <shentey@gmail.com>

> hw/isa/piix4.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
>index 15f344dbb7..a2165c6a49 100644
>--- a/hw/isa/piix4.c
>+++ b/hw/isa/piix4.c
>@@ -115,10 +115,10 @@ static void piix4_isa_reset(DeviceState *dev)
>     pci_conf[0x4c] = 0x4d;
>     pci_conf[0x4e] = 0x03;
>     pci_conf[0x4f] = 0x00;
>-    pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10
>-    pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10
>-    pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11
>-    pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11
>+    pci_conf[0x60] = 0x80;
>+    pci_conf[0x61] = 0x80;
>+    pci_conf[0x62] = 0x80;
>+    pci_conf[0x63] = 0x80;
>     pci_conf[0x69] = 0x02;
>     pci_conf[0x70] = 0x80;
>     pci_conf[0x76] = 0x0c;