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Re: [PATCH v2 1/2] hw/intc/loongarch_pch_msi: add irq number property
From: |
maobibo |
Subject: |
Re: [PATCH v2 1/2] hw/intc/loongarch_pch_msi: add irq number property |
Date: |
Fri, 23 Dec 2022 17:15:16 +0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 |
Tianrui,
We should solve all the issues in the previous mailing list,
and send the next version.
20221215065011.2133471-2-zhaotianrui@loongson.cn/">https://patchwork.kernel.org/project/qemu-devel/patch/20221215065011.2133471-2-zhaotianrui@loongson.cn/
We should not be in such hurry:)
regards
bibo,mao
在 2022/12/23 16:08, Tianrui Zhao 写道:
> This patch adds irq number property for loongarch msi interrupt
> controller, and remove hard coding irq number macro.
>
> Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
> ---
> hw/intc/loongarch_pch_msi.c | 30 ++++++++++++++++++++++++++---
> hw/loongarch/virt.c | 11 +++++++----
> include/hw/intc/loongarch_pch_msi.h | 3 ++-
> include/hw/pci-host/ls7a.h | 1 -
> 4 files changed, 36 insertions(+), 9 deletions(-)
>
> diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
> index b36d6d76e4..5b8de43d42 100644
> --- a/hw/intc/loongarch_pch_msi.c
> +++ b/hw/intc/loongarch_pch_msi.c
> @@ -32,7 +32,7 @@ static void loongarch_msi_mem_write(void *opaque, hwaddr
> addr,
> */
> irq_num = (val & 0xff) - s->irq_base;
> trace_loongarch_msi_set_irq(irq_num);
> - assert(irq_num < PCH_MSI_IRQ_NUM);
> + assert(irq_num < s->irq_num);
> qemu_set_irq(s->pch_msi_irq[irq_num], 1);
> }
>
> @@ -49,6 +49,29 @@ static void pch_msi_irq_handler(void *opaque, int irq, int
> level)
> qemu_set_irq(s->pch_msi_irq[irq], level);
> }
>
> +static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp)
> +{
> + LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev);
> +
> + assert(s->irq_num > 0);
> +
> + s->pch_msi_irq = g_malloc(sizeof(qemu_irq) * s->irq_num);
> + if (!s->pch_msi_irq) {
> + error_report("loongarch_pch_msi: fail to alloc memory");
> + exit(1);
> + }
> +
> + qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num);
> + qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num);
> +}
> +
> +static void loongarch_pch_msi_unrealize(DeviceState *dev)
> +{
> + LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev);
> +
> + g_free(s->pch_msi_irq);
> +}
> +
> static void loongarch_pch_msi_init(Object *obj)
> {
> LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(obj);
> @@ -59,12 +82,11 @@ static void loongarch_pch_msi_init(Object *obj)
> sysbus_init_mmio(sbd, &s->msi_mmio);
> msi_nonbroken = true;
>
> - qdev_init_gpio_out(DEVICE(obj), s->pch_msi_irq, PCH_MSI_IRQ_NUM);
> - qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM);
> }
>
> static Property loongarch_msi_properties[] = {
> DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
> + DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -72,6 +94,8 @@ static void loongarch_pch_msi_class_init(ObjectClass
> *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> + dc->realize = loongarch_pch_msi_realize;
> + dc->unrealize = loongarch_pch_msi_unrealize;
> device_class_set_props(dc, loongarch_msi_properties);
> }
>
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 958be74fa1..3547d5f711 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -496,7 +496,7 @@ static void loongarch_irq_init(LoongArchMachineState
> *lams)
> LoongArchCPU *lacpu;
> CPULoongArchState *env;
> CPUState *cpu_state;
> - int cpu, pin, i;
> + int cpu, pin, i, start, num;
>
> ipi = qdev_new(TYPE_LOONGARCH_IPI);
> sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
> @@ -576,14 +576,17 @@ static void loongarch_irq_init(LoongArchMachineState
> *lams)
> }
>
> pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
> - qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START);
> + start = PCH_PIC_IRQ_NUM;
> + num = 256 - start;
> + qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
> + qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
> d = SYS_BUS_DEVICE(pch_msi);
> sysbus_realize_and_unref(d, &error_fatal);
> sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
> - for (i = 0; i < PCH_MSI_IRQ_NUM; i++) {
> + for (i = 0; i < num; i++) {
> /* Connect 192 pch_msi irqs to extioi */
> qdev_connect_gpio_out(DEVICE(d), i,
> - qdev_get_gpio_in(extioi, i +
> PCH_MSI_IRQ_START));
> + qdev_get_gpio_in(extioi, i + start));
> }
>
> loongarch_devices_init(pch_pic, lams);
> diff --git a/include/hw/intc/loongarch_pch_msi.h
> b/include/hw/intc/loongarch_pch_msi.h
> index 6d67560dea..c5a52bc327 100644
> --- a/include/hw/intc/loongarch_pch_msi.h
> +++ b/include/hw/intc/loongarch_pch_msi.h
> @@ -15,8 +15,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI,
> LOONGARCH_PCH_MSI)
>
> struct LoongArchPCHMSI {
> SysBusDevice parent_obj;
> - qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
> + qemu_irq *pch_msi_irq;
> MemoryRegion msi_mmio;
> /* irq base passed to upper extioi intc */
> unsigned int irq_base;
> + unsigned int irq_num;
> };
> diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
> index df7fa55a30..6443327bd7 100644
> --- a/include/hw/pci-host/ls7a.h
> +++ b/include/hw/pci-host/ls7a.h
> @@ -34,7 +34,6 @@
> */
> #define PCH_PIC_IRQ_OFFSET 64
> #define VIRT_DEVICE_IRQS 16
> -#define VIRT_PCI_IRQS 48
> #define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
> #define VIRT_UART_BASE 0x1fe001e0
> #define VIRT_UART_SIZE 0X100