Re: [RFC PATCH 01/43] target/loongarch: Add vector data type vec_t

[Richard Henderson]

On 12/27/22 18:34, gaosong wrote:
> The manual says "The lower 64 bits of each vector register overlap with the floating point 
> register of the same number.  In other words
> When the basic floating-point instruction is executed to update the floating-point 
> register, the low 64 bits of the corresponding LSX register
> are also updated to the same value."
>
> So If we don't use the fpr_t.  we should:
> 1 Update LSX low 64 bits after floating point instruction translation;
> 2 Update floating-point registers after LSX instruction translation.
>
> Should we do this  or have I misunderstood?

You should use fpr_t, you should not use cpu_fpr[].
This is the same as aarch64, for instance.

A related question though: does the manual mention whether the fpu instructions only 
modify the lower 64 bits, or do the high 64-bits become zeroed, nanboxed, or unspecified?


> > I strongly suggest that you introduce wrappers to load/store fpr values from their env 
> > slots.  I would name them similarly to gpr_{src,dst}, gen_set_gpr.
> Got it.


r~