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[PULL 13/47] tcg: Remove TCG_TARGET_STACK_GROWSUP
From: |
Richard Henderson |
Subject: |
[PULL 13/47] tcg: Remove TCG_TARGET_STACK_GROWSUP |
Date: |
Thu, 29 Dec 2022 16:01:47 -0800 |
The hppa host code has been removed since 2013; this
should have been deleted at the same time.
Fixes: 802b5081233a ("tcg-hppa: Remove tcg backend")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/tcg.c | 32 ++------------------------------
3 files changed, 2 insertions(+), 32 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 485f685bd2..e145d50fef 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -16,7 +16,6 @@
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
-#undef TCG_TARGET_STACK_GROWSUP
typedef enum {
TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3,
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 7e96495392..56c1ac4586 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -30,7 +30,6 @@ extern int arm_arch;
#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7)
-#undef TCG_TARGET_STACK_GROWSUP
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 215ddf2db5..05d2b70ab7 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1552,25 +1552,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs,
TCGTemp **args)
}
if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
- /*
- * If stack grows up, then we will be placing successive
- * arguments at lower addresses, which means we need to
- * reverse the order compared to how we would normally
- * treat either big or little-endian. For those arguments
- * that will wind up in registers, this still works for
- * HPPA (the only current STACK_GROWSUP target) since the
- * argument registers are *also* allocated in decreasing
- * order. If another such target is added, this logic may
- * have to get more complicated to differentiate between
- * stack arguments and register arguments.
- */
-#if HOST_BIG_ENDIAN != defined(TCG_TARGET_STACK_GROWSUP)
- op->args[pi++] = temp_arg(args[i] + 1);
- op->args[pi++] = temp_arg(args[i]);
-#else
- op->args[pi++] = temp_arg(args[i]);
- op->args[pi++] = temp_arg(args[i] + 1);
-#endif
+ op->args[pi++] = temp_arg(args[i] + HOST_BIG_ENDIAN);
+ op->args[pi++] = temp_arg(args[i] + !HOST_BIG_ENDIAN);
real_args += 2;
continue;
}
@@ -3854,12 +3837,6 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const
TCGOp *op)
return true;
}
-#ifdef TCG_TARGET_STACK_GROWSUP
-#define STACK_DIR(x) (-(x))
-#else
-#define STACK_DIR(x) (x)
-#endif
-
static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
{
const int nb_oargs = TCGOP_CALLO(op);
@@ -3899,18 +3876,13 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
for (i = nb_regs; i < nb_iargs; i++) {
arg = op->args[nb_oargs + i];
-#ifdef TCG_TARGET_STACK_GROWSUP
- stack_offset -= sizeof(tcg_target_long);
-#endif
if (arg != TCG_CALL_DUMMY_ARG) {
ts = arg_temp(arg);
temp_load(s, ts, tcg_target_available_regs[ts->type],
s->reserved_regs, 0);
tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
}
-#ifndef TCG_TARGET_STACK_GROWSUP
stack_offset += sizeof(tcg_target_long);
-#endif
}
/* assign input registers */
--
2.34.1
- [PULL 06/47] hw/mips: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_mips_irq_request, (continued)
- [PULL 06/47] hw/mips: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_mips_irq_request, Richard Henderson, 2022/12/29
- [PULL 04/47] tcg: Cleanup trailing whitespace, Richard Henderson, 2022/12/29
- [PULL 09/47] target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip, Richard Henderson, 2022/12/29
- [PULL 03/47] tcg/s390x: Fix coding style, Richard Henderson, 2022/12/29
- [PULL 01/47] tcg: convert tcg/README to rst, Richard Henderson, 2022/12/29
- [PULL 07/47] target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_maybe_interrupt, Richard Henderson, 2022/12/29
- [PULL 15/47] tcg: Fix tcg_reg_alloc_dup*, Richard Henderson, 2022/12/29
- [PULL 08/47] target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb, Richard Henderson, 2022/12/29
- [PULL 11/47] accel/tcg: Use QEMU_IOTHREAD_LOCK_GUARD in io_readx/io_writex, Richard Henderson, 2022/12/29
- [PULL 12/47] tcg: Tidy tcg_reg_alloc_op, Richard Henderson, 2022/12/29
- [PULL 13/47] tcg: Remove TCG_TARGET_STACK_GROWSUP,
Richard Henderson <=
- [PULL 10/47] hw/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_set_irq, Richard Henderson, 2022/12/29
- [PULL 16/47] tcg: Centralize updates to reg_to_temp, Richard Henderson, 2022/12/29
- [PULL 14/47] tci: MAX_OPC_PARAM_IARGS is no longer used, Richard Henderson, 2022/12/29
- [PULL 17/47] tcg: Remove check_regs, Richard Henderson, 2022/12/29
- [PULL 18/47] tcg: Massage process_op_defs(), Richard Henderson, 2022/12/29
- [PULL 20/47] accel/tcg: Set cflags_next_tb in cpu_common_initfn, Richard Henderson, 2022/12/29
- [PULL 19/47] tcg: Introduce paired register allocation, Richard Henderson, 2022/12/29
- [PULL 21/47] target/sparc: Avoid TCGV_{LOW,HIGH}, Richard Henderson, 2022/12/29
- [PULL 22/47] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h, Richard Henderson, 2022/12/29
- [PULL 36/47] tcg: Vary the allocation size for TCGOp, Richard Henderson, 2022/12/29