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[RFC PATCH 3/4] target/riscv: check smstateen fcsr flag
From: |
Mayuresh Chitale |
Subject: |
[RFC PATCH 3/4] target/riscv: check smstateen fcsr flag |
Date: |
Mon, 10 Apr 2023 19:43:15 +0530 |
If misa.F and smstateen_fcsr_ok flag are clear then all the floating
point instructions must generate an appropriate exception.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
target/riscv/insn_trans/trans_rvf.c.inc | 24 ++++++++++++++++++++---
target/riscv/insn_trans/trans_rvzfh.c.inc | 4 ++++
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvf.c.inc
b/target/riscv/insn_trans/trans_rvf.c.inc
index 052408f45c..6173dace46 100644
--- a/target/riscv/insn_trans/trans_rvf.c.inc
+++ b/target/riscv/insn_trans/trans_rvf.c.inc
@@ -24,9 +24,27 @@
return false; \
} while (0)
-#define REQUIRE_ZFINX_OR_F(ctx) do {\
- if (!ctx->cfg_ptr->ext_zfinx) { \
- REQUIRE_EXT(ctx, RVF); \
+#ifndef CONFIG_USER_ONLY
+#define smstateen_fcsr_check(ctx) do { \
+ if (!ctx->smstateen_fcsr_ok) { \
+ if (ctx->virt_enabled) { \
+ generate_exception(ctx, RISCV_EXCP_VIRT_INSTRUCTION_FAULT); \
+ } else { \
+ generate_exception(ctx, RISCV_EXCP_ILLEGAL_INST); \
+ } \
+ return true; \
+ } \
+} while (0)
+#else
+#define smstateen_fcsr_check(ctx)
+#endif
+
+#define REQUIRE_ZFINX_OR_F(ctx) do { \
+ if (!has_ext(ctx, RVF)) { \
+ if (!ctx->cfg_ptr->ext_zfinx) { \
+ return false; \
+ } \
+ smstateen_fcsr_check(ctx); \
} \
} while (0)
diff --git a/target/riscv/insn_trans/trans_rvzfh.c.inc
b/target/riscv/insn_trans/trans_rvzfh.c.inc
index 74dde37ff7..304bee1002 100644
--- a/target/riscv/insn_trans/trans_rvzfh.c.inc
+++ b/target/riscv/insn_trans/trans_rvzfh.c.inc
@@ -20,24 +20,28 @@
if (!ctx->cfg_ptr->ext_zfh) { \
return false; \
} \
+ smstateen_fcsr_check(ctx); \
} while (0)
#define REQUIRE_ZHINX_OR_ZFH(ctx) do { \
if (!ctx->cfg_ptr->ext_zhinx && !ctx->cfg_ptr->ext_zfh) { \
return false; \
} \
+ smstateen_fcsr_check(ctx); \
} while (0)
#define REQUIRE_ZFHMIN(ctx) do { \
if (!ctx->cfg_ptr->ext_zfhmin) { \
return false; \
} \
+ smstateen_fcsr_check(ctx); \
} while (0)
#define REQUIRE_ZFHMIN_OR_ZHINXMIN(ctx) do { \
if (!(ctx->cfg_ptr->ext_zfhmin || ctx->cfg_ptr->ext_zhinxmin)) { \
return false; \
} \
+ smstateen_fcsr_check(ctx); \
} while (0)
static bool trans_flh(DisasContext *ctx, arg_flh *a)
--
2.34.1