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[RFC PATCH v3 03/44] target/loongarch: Add CHECK_SXE maccro for check LS
From: |
Song Gao |
Subject: |
[RFC PATCH v3 03/44] target/loongarch: Add CHECK_SXE maccro for check LSX enable |
Date: |
Thu, 20 Apr 2023 16:06:28 +0800 |
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/cpu.c | 2 ++
target/loongarch/cpu.h | 2 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 11 +++++++++++
3 files changed, 15 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 18b41221a6..55d7f9255e 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -52,6 +52,7 @@ static const char * const excp_names[] = {
[EXCCODE_FPE] = "Floating Point Exception",
[EXCCODE_DBP] = "Debug breakpoint",
[EXCCODE_BCE] = "Bound Check Exception",
+ [EXCCODE_SXD] = "128 bit vector instructions Disable exception",
};
const char *loongarch_exception_name(int32_t exception)
@@ -187,6 +188,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
case EXCCODE_FPD:
case EXCCODE_FPE:
case EXCCODE_BCE:
+ case EXCCODE_SXD:
env->CSR_BADV = env->pc;
QEMU_FALLTHROUGH;
case EXCCODE_ADEM:
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index fd0f61936d..6755b1f0c7 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -419,6 +419,7 @@ static inline int cpu_mmu_index(CPULoongArchState *env,
bool ifetch)
#define HW_FLAGS_PLV_MASK R_CSR_CRMD_PLV_MASK /* 0x03 */
#define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */
#define HW_FLAGS_EUEN_FPE 0x04
+#define HW_FLAGS_EUEN_SXE 0x08
static inline void cpu_get_tb_cpu_state(CPULoongArchState *env,
target_ulong *pc,
@@ -429,6 +430,7 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState
*env,
*cs_base = 0;
*flags = env->CSR_CRMD & (R_CSR_CRMD_PLV_MASK | R_CSR_CRMD_PG_MASK);
*flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, FPE) * HW_FLAGS_EUEN_FPE;
+ *flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE) * HW_FLAGS_EUEN_SXE;
}
void loongarch_cpu_list(void);
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc
b/target/loongarch/insn_trans/trans_lsx.c.inc
index 1cf3ab34a9..5dedb044d7 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -3,3 +3,14 @@
* LSX translate functions
* Copyright (c) 2022-2023 Loongson Technology Corporation Limited
*/
+
+#ifndef CONFIG_USER_ONLY
+#define CHECK_SXE do { \
+ if ((ctx->base.tb->flags & HW_FLAGS_EUEN_SXE) == 0) { \
+ generate_exception(ctx, EXCCODE_SXD); \
+ return true; \
+ } \
+} while (0)
+#else
+#define CHECK_SXE
+#endif
--
2.31.1
- [RFC PATCH v3 00/44] Add LoongArch LSX instructions, Song Gao, 2023/04/20
- [RFC PATCH v3 03/44] target/loongarch: Add CHECK_SXE maccro for check LSX enable,
Song Gao <=
- [RFC PATCH v3 02/44] target/loongarch: meson.build support build LSX, Song Gao, 2023/04/20
- [RFC PATCH v3 06/44] target/loongarch: Implement vneg, Song Gao, 2023/04/20
- [RFC PATCH v3 04/44] target/loongarch: Implement vadd/vsub, Song Gao, 2023/04/20
- [RFC PATCH v3 05/44] target/loongarch: Implement vaddi/vsubi, Song Gao, 2023/04/20
- [RFC PATCH v3 07/44] target/loongarch: Implement vsadd/vssub, Song Gao, 2023/04/20
- [RFC PATCH v3 08/44] target/loongarch: Implement vhaddw/vhsubw, Song Gao, 2023/04/20
- [RFC PATCH v3 01/44] target/loongarch: Add LSX data type VReg, Song Gao, 2023/04/20