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[PATCH v5 1/1] hw/arm/sbsa-ref: use XHCI to replace EHCI
From: |
Yuquan Wang |
Subject: |
[PATCH v5 1/1] hw/arm/sbsa-ref: use XHCI to replace EHCI |
Date: |
Wed, 21 Jun 2023 18:38:47 +0800 |
The current sbsa-ref cannot use EHCI controller which is only
able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
Hence, this uses XHCI to provide a usb controller with 64-bit
DMA capablity instead of EHCI.
Bumping platform version to 0.3 with this change.
Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
---
docs/system/arm/sbsa.rst | 2 +-
hw/arm/Kconfig | 2 +-
hw/arm/sbsa-ref.c | 23 +++++++++++++----------
3 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index f571fe645e..f0c809eb60 100644
--- a/docs/system/arm/sbsa.rst
+++ b/docs/system/arm/sbsa.rst
@@ -19,7 +19,7 @@ The ``sbsa-ref`` board supports:
- A configurable number of AArch64 CPUs
- GIC version 3
- System bus AHCI controller
- - System bus EHCI controller
+ - System bus XHCI controller
- CDROM and hard disc on AHCI bus
- E1000E ethernet card on PCIe bus
- Bochs display adapter on PCIe bus
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 7de17d1e8c..7e68348440 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -266,7 +266,7 @@ config SBSA_REF
select PL011 # UART
select PL031 # RTC
select PL061 # GPIO
- select USB_EHCI_SYSBUS
+ select USB_XHCI_SYSBUS
select WDT_SBSA
select BOCHS_DISPLAY
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index de21200ff9..dbd9f89837 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -40,6 +40,7 @@
#include "hw/pci-host/gpex.h"
#include "hw/qdev-properties.h"
#include "hw/usb.h"
+#include "hw/usb/xhci.h"
#include "hw/char/pl011.h"
#include "hw/watchdog/sbsa_gwdt.h"
#include "net/net.h"
@@ -82,7 +83,7 @@ enum {
SBSA_SECURE_UART_MM,
SBSA_SECURE_MEM,
SBSA_AHCI,
- SBSA_EHCI,
+ SBSA_XHCI,
};
struct SBSAMachineState {
@@ -119,7 +120,7 @@ static const MemMapEntry sbsa_ref_memmap[] = {
[SBSA_SMMU] = { 0x60050000, 0x00020000 },
/* Space here reserved for more SMMUs */
[SBSA_AHCI] = { 0x60100000, 0x00010000 },
- [SBSA_EHCI] = { 0x60110000, 0x00010000 },
+ [SBSA_XHCI] = { 0x60110000, 0x00010000 },
/* Space here reserved for other devices */
[SBSA_PCIE_PIO] = { 0x7fff0000, 0x00010000 },
/* 32-bit address PCIE MMIO space */
@@ -139,7 +140,7 @@ static const int sbsa_ref_irqmap[] = {
[SBSA_SECURE_UART] = 8,
[SBSA_SECURE_UART_MM] = 9,
[SBSA_AHCI] = 10,
- [SBSA_EHCI] = 11,
+ [SBSA_XHCI] = 11,
[SBSA_SMMU] = 12, /* ... to 15 */
[SBSA_GWDT_WS0] = 16,
};
@@ -219,7 +220,7 @@ static void create_fdt(SBSAMachineState *sms)
* fw compatibility.
*/
qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0);
- qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 1);
+ qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3);
if (ms->numa_state->have_numa_distance) {
int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t);
@@ -575,13 +576,15 @@ static void create_ahci(const SBSAMachineState *sms)
}
}
-static void create_ehci(const SBSAMachineState *sms)
+static void create_xhci(const SBSAMachineState *sms)
{
- hwaddr base = sbsa_ref_memmap[SBSA_EHCI].base;
- int irq = sbsa_ref_irqmap[SBSA_EHCI];
+ hwaddr base = sbsa_ref_memmap[SBSA_XHCI].base;
+ int irq = sbsa_ref_irqmap[SBSA_XHCI];
+ DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
- sysbus_create_simple("platform-ehci-usb", base,
- qdev_get_gpio_in(sms->gic, irq));
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic,
irq));
}
static void create_smmu(const SBSAMachineState *sms, PCIBus *bus)
@@ -803,7 +806,7 @@ static void sbsa_ref_init(MachineState *machine)
create_ahci(sms);
- create_ehci(sms);
+ create_xhci(sms);
create_pcie(sms);
--
2.34.1