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[PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge
From: |
Richard Henderson |
Subject: |
[PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge |
Date: |
Wed, 23 Aug 2023 13:23:01 -0700 |
The setcond + neg + or sequence is a complex method of
performing a conditional move.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 17 ++++-------------
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index bd877a5e4a..fa80a91161 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2916,7 +2916,7 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1,
TCGv s2,
tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1);
tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2);
- tcg_gen_andi_tl(dst, lo1, omask);
+ tcg_gen_andi_tl(lo1, lo1, omask);
tcg_gen_andi_tl(lo2, lo2, omask);
amask = -8;
@@ -2926,18 +2926,9 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv
s1, TCGv s2,
tcg_gen_andi_tl(s1, s1, amask);
tcg_gen_andi_tl(s2, s2, amask);
- /* We want to compute
- dst = (s1 == s2 ? lo1 : lo1 & lo2).
- We've already done dst = lo1, so this reduces to
- dst &= (s1 == s2 ? -1 : lo2)
- Which we perform by
- lo2 |= -(s1 == s2)
- dst &= lo2
- */
- tcg_gen_setcond_tl(TCG_COND_EQ, lo1, s1, s2);
- tcg_gen_neg_tl(lo1, lo1);
- tcg_gen_or_tl(lo2, lo2, lo1);
- tcg_gen_and_tl(dst, dst, lo2);
+ /* Compute dst = (s1 == s2 ? lo1 : lo1 & lo2). */
+ tcg_gen_and_tl(lo2, lo2, lo1);
+ tcg_gen_movcond_tl(TCG_COND_EQ, dst, s1, s2, lo1, lo2);
}
static void gen_alignaddr(TCGv dst, TCGv s1, TCGv s2, bool left)
--
2.34.1
- [PULL 35/48] tcg/i386: Use CMP+SBB in tcg_out_setcond, (continued)
- [PULL 35/48] tcg/i386: Use CMP+SBB in tcg_out_setcond, Richard Henderson, 2023/08/23
- [PULL 20/48] target/m68k: Use tcg_gen_negsetcond_*, Richard Henderson, 2023/08/23
- [PULL 19/48] target/arm: Use tcg_gen_negsetcond_*, Richard Henderson, 2023/08/23
- [PULL 37/48] tcg/i386: Use shift in tcg_out_setcond, Richard Henderson, 2023/08/23
- [PULL 36/48] tcg/i386: Clear dest first in tcg_out_setcond if possible, Richard Henderson, 2023/08/23
- [PULL 13/48] tcg/i386: Allow immediate as input to deposit_*, Richard Henderson, 2023/08/23
- [PULL 14/48] docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32(), Richard Henderson, 2023/08/23
- [PULL 07/48] include/exec: Widen tlb_hit/tlb_hit_page(), Richard Henderson, 2023/08/23
- [PULL 09/48] accel/tcg: Update run_on_cpu_data static assert, Richard Henderson, 2023/08/23
- [PULL 15/48] tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32, Richard Henderson, 2023/08/23
- [PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge,
Richard Henderson <=
- [PULL 26/48] tcg/ppc: Use the Set Boolean Extension, Richard Henderson, 2023/08/23
- [PULL 28/48] tcg/arm: Implement negsetcond_i32, Richard Henderson, 2023/08/23
- [PULL 22/48] target/ppc: Use tcg_gen_negsetcond_*, Richard Henderson, 2023/08/23
- [PULL 38/48] tcg/i386: Implement negsetcond_*, Richard Henderson, 2023/08/23
- [PULL 40/48] tcg/tcg-op: Document bswap16_i64() byte pattern, Richard Henderson, 2023/08/23
- [PULL 41/48] tcg/tcg-op: Document bswap32_i32() byte pattern, Richard Henderson, 2023/08/23
- [PULL 44/48] tcg/tcg-op: Document hswap_i32/64() byte pattern, Richard Henderson, 2023/08/23
- [PULL 45/48] tcg/tcg-op: Document wswap_i64() byte pattern, Richard Henderson, 2023/08/23
- [PULL 42/48] tcg/tcg-op: Document bswap32_i64() byte pattern, Richard Henderson, 2023/08/23
- [PULL 43/48] tcg/tcg-op: Document bswap64_i64() byte pattern, Richard Henderson, 2023/08/23