Re: [PATCH v4 0/6] Complete i.MX6UL and i.MX7 processor for bare metal application.

[Peter Maydell]

On Fri, 25 Aug 2023 at 13:21, Jean-Christophe Dubois
<jcd@tribudubois.net> wrote:
>
> This patch adds a few unimplemented TZ devices (TZASC and CSU) to
> i.MX6UL and i.MX7 processors to avoid bare metal application to
> experiment "bus error" when acccessing these devices.
>
> It also adds some internal memory segments (OCRAM) to the i.MX7 to
> allow bare metal application to use them.
>
> Last, it adds the SRC device to the i.MX7 processor to allow bare
> metal application to start the secondary Cortex-A7 core.
>
> Note: When running Linux inside Qemu, the secondary core is started
> by calling PSCI API and Qemu is emulating PSCI without needing access
> to the SRC device. This is why Linux is using the 2 cores in Qemu
> even if the SRC is not implemented. This is not the case when running
> bare metal application (like u-boot itself) that do not rely on the
> PSCI service being available.



Applied to target-arm.next, thanks.

-- PMM