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Re: [PATCH RFC] hw/sh4/sh7750: Add STBCR/STBCR2 register support
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From: |
Geert Uytterhoeven |
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Subject: |
Re: [PATCH RFC] hw/sh4/sh7750: Add STBCR/STBCR2 register support |
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Date: |
Wed, 18 Oct 2023 15:03:38 +0200 |
Hi Adrian,
On Wed, Oct 18, 2023 at 2:46 PM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Wed, 2023-10-18 at 14:40 +0200, Geert Uytterhoeven wrote:
> > The new Linux SH7750 clock driver uses the registers for power-down
> > mode control, causing a crash:
> >
> > byte read to SH7750_STBCR_A7 (0x000000001fc00004) not supported
> > Aborted (core dumped)
> >
> > Fix this by adding support for the Standby Control Registers STBCR and
> > STBCR2.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Is this supposed to be applied on top of Yoshinori's DT conversion series?
No, it's a patch for QEMU. Sorry for the confusion.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds