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[PATCH v2 14/19] tcg: add negsetcondi
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From: |
Paolo Bonzini |
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Subject: |
[PATCH v2 14/19] tcg: add negsetcondi |
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Date: |
Thu, 19 Oct 2023 12:46:43 +0200 |
This can be useful to write a shift bit extraction that does not
depend on TARGET_LONG_BITS.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/tcg/tcg-op-common.h | 4 ++++
include/tcg/tcg-op.h | 2 ++
tcg/tcg-op.c | 12 ++++++++++++
3 files changed, 18 insertions(+)
diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index 2048f92b5e1..2295f2d7085 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -346,6 +346,8 @@ void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
TCGv_i32 arg1, int32_t arg2);
void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret,
TCGv_i32 arg1, TCGv_i32 arg2);
+void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret,
+ TCGv_i32 arg1, int32_t arg2);
void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
@@ -544,6 +546,8 @@ void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
TCGv_i64 arg1, int64_t arg2);
void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret,
TCGv_i64 arg1, TCGv_i64 arg2);
+void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret,
+ TCGv_i64 arg1, int64_t arg2);
void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 80cfcf8104b..78e474d83e9 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -201,6 +201,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64)
#define tcg_gen_setcond_tl tcg_gen_setcond_i64
#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
#define tcg_gen_negsetcond_tl tcg_gen_negsetcond_i64
+#define tcg_gen_negsetcondi_tl tcg_gen_negsetcondi_i64
#define tcg_gen_mul_tl tcg_gen_mul_i64
#define tcg_gen_muli_tl tcg_gen_muli_i64
#define tcg_gen_div_tl tcg_gen_div_i64
@@ -319,6 +320,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64)
#define tcg_gen_setcond_tl tcg_gen_setcond_i32
#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
#define tcg_gen_negsetcond_tl tcg_gen_negsetcond_i32
+#define tcg_gen_negsetcondi_tl tcg_gen_negsetcondi_i32
#define tcg_gen_mul_tl tcg_gen_mul_i32
#define tcg_gen_muli_tl tcg_gen_muli_i32
#define tcg_gen_div_tl tcg_gen_div_i32
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 393dbcd01c3..35dcdd88126 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -291,6 +291,12 @@ void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret,
}
}
+void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret,
+ TCGv_i32 arg1, int32_t arg2)
+{
+ tcg_gen_negsetcond_i32(cond, ret, arg1, tcg_constant_i32(arg2));
+}
+
void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
{
if (arg2 == 0) {
@@ -1602,6 +1608,12 @@ void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
}
}
+void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret,
+ TCGv_i64 arg1, int64_t arg2)
+{
+ tcg_gen_negsetcond_i64(cond, ret, arg1, tcg_constant_i64(arg2));
+}
+
void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret,
TCGv_i64 arg1, TCGv_i64 arg2)
{
--
2.41.0
- Re: [PATCH v2 02/19] target/i386: validate VEX.W for AVX instructions, (continued)
- [PATCH v2 03/19] target/i386: implement SHA instructions, Paolo Bonzini, 2023/10/19
- [PATCH v2 06/19] target/i386: accept full MemOp in gen_ext_tl, Paolo Bonzini, 2023/10/19
- [PATCH v2 01/19] target/i386: group common checks in the decoding phase, Paolo Bonzini, 2023/10/19
- [PATCH v2 08/19] target/i386: implement CMPccXADD, Paolo Bonzini, 2023/10/19
- [PATCH v2 11/19] target/i386: move 00-5F opcodes to new decoder, Paolo Bonzini, 2023/10/19
- [PATCH v2 09/19] target/i386: do not clobber A0 in POP translation, Paolo Bonzini, 2023/10/19
- [PATCH v2 14/19] tcg: add negsetcondi,
Paolo Bonzini <=
- [PATCH v2 07/19] target/i386: introduce flags writeback mechanism, Paolo Bonzini, 2023/10/19
- [PATCH v2 10/19] target/i386: reintroduce debugging mechanism, Paolo Bonzini, 2023/10/19
- [PATCH v2 13/19] target/i386: split eflags computation out of gen_compute_eflags, Paolo Bonzini, 2023/10/19
- [PATCH v2 12/19] target/i386: adjust decoding of J operand, Paolo Bonzini, 2023/10/19
- [PATCH v2 16/19] target/i386: move operand load and writeback out of gen_cmovcc1, Paolo Bonzini, 2023/10/19
- [PATCH v2 15/19] target/i386: move 60-BF opcodes to new decoder, Paolo Bonzini, 2023/10/19
- [PATCH v2 17/19] target/i386: move remaining conditional operations to new decoder, Paolo Bonzini, 2023/10/19