[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 17/90] target/sparc: Merge gen_branch_[an] with only caller
|
From: |
Richard Henderson |
|
Subject: |
[PATCH v3 17/90] target/sparc: Merge gen_branch_[an] with only caller |
|
Date: |
Fri, 20 Oct 2023 22:30:45 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 73 +++++++++++++++++-----------------------
1 file changed, 30 insertions(+), 43 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index b8d51d6d64..503598ed93 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -900,47 +900,6 @@ static void gen_branch2(DisasContext *dc, target_ulong pc1,
gen_goto_tb(dc, 1, pc2, pc2 + 4);
}
-static void gen_branch_a(DisasContext *dc, target_ulong pc1)
-{
- TCGLabel *l1 = gen_new_label();
- target_ulong npc = dc->npc;
-
- tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cond, 0, l1);
-
- gen_goto_tb(dc, 0, npc, pc1);
-
- gen_set_label(l1);
- gen_goto_tb(dc, 1, npc + 4, npc + 8);
-
- dc->base.is_jmp = DISAS_NORETURN;
-}
-
-static void gen_branch_n(DisasContext *dc, target_ulong pc1)
-{
- target_ulong npc = dc->npc;
-
- if (npc & 3) {
- switch (npc) {
- case DYNAMIC_PC:
- case DYNAMIC_PC_LOOKUP:
- tcg_gen_mov_tl(cpu_pc, cpu_npc);
- tcg_gen_addi_tl(cpu_npc, cpu_npc, 4);
- tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc,
- cpu_cond, tcg_constant_tl(0),
- tcg_constant_tl(pc1), cpu_npc);
- dc->pc = npc;
- break;
- default:
- g_assert_not_reached();
- }
- } else {
- dc->pc = npc;
- dc->jump_pc[0] = pc1;
- dc->jump_pc[1] = npc + 4;
- dc->npc = JUMP_PC;
- }
-}
-
static void gen_generic_branch(DisasContext *dc)
{
TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]);
@@ -2942,10 +2901,38 @@ static bool advance_jump_uncond_always(DisasContext
*dc, bool annul,
static bool advance_jump_cond(DisasContext *dc, bool annul, target_ulong dest)
{
+ target_ulong npc = dc->npc;
+
if (annul) {
- gen_branch_a(dc, dest);
+ TCGLabel *l1 = gen_new_label();
+
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cond, 0, l1);
+ gen_goto_tb(dc, 0, npc, dest);
+ gen_set_label(l1);
+ gen_goto_tb(dc, 1, npc + 4, npc + 8);
+
+ dc->base.is_jmp = DISAS_NORETURN;
} else {
- gen_branch_n(dc, dest);
+ if (npc & 3) {
+ switch (npc) {
+ case DYNAMIC_PC:
+ case DYNAMIC_PC_LOOKUP:
+ tcg_gen_mov_tl(cpu_pc, cpu_npc);
+ tcg_gen_addi_tl(cpu_npc, cpu_npc, 4);
+ tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc,
+ cpu_cond, tcg_constant_tl(0),
+ tcg_constant_tl(dest), cpu_npc);
+ dc->pc = npc;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ } else {
+ dc->pc = npc;
+ dc->jump_pc[0] = dest;
+ dc->jump_pc[1] = npc + 4;
+ dc->npc = JUMP_PC;
+ }
}
return true;
}
--
2.34.1
- [PATCH v3 06/90] target/sparc: Define features via cpu-feature.h.inc, (continued)
- [PATCH v3 06/90] target/sparc: Define features via cpu-feature.h.inc, Richard Henderson, 2023/10/21
- [PATCH v3 07/90] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties, Richard Henderson, 2023/10/21
- [PATCH v3 09/90] target/sparc: Add decodetree infrastructure, Richard Henderson, 2023/10/21
- [PATCH v3 08/90] target/sparc: Remove sparcv7 cpu features, Richard Henderson, 2023/10/21
- [PATCH v3 10/90] target/sparc: Define AM_CHECK for sparc32, Richard Henderson, 2023/10/21
- [PATCH v3 11/90] target/sparc: Move CALL to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 14/90] target/sparc: Move FBPfcc and FBfcc to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 12/90] target/sparc: Move BPcc and Bicc to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 13/90] target/sparc: Move BPr to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 15/90] target/sparc: Merge gen_cond with only caller, Richard Henderson, 2023/10/21
- [PATCH v3 17/90] target/sparc: Merge gen_branch_[an] with only caller,
Richard Henderson <=
- [PATCH v3 16/90] target/sparc: Merge gen_fcond with only caller, Richard Henderson, 2023/10/21
- [PATCH v3 18/90] target/sparc: Pass DisasCompare to advance_jump_cond, Richard Henderson, 2023/10/21
- [PATCH v3 19/90] target/sparc: Move SETHI to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 20/90] target/sparc: Move Tcc to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 30/90] target/sparc: Move ADDC to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 21/90] target/sparc: Move RDASR, STBAR, MEMBAR to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 27/90] target/sparc: Move WRWIM, WRPR to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 28/90] target/sparc: Move WRTBR, WRHPR to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 31/90] target/sparc: Move MULX to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 33/90] target/sparc: Move SUBC to decodetree, Richard Henderson, 2023/10/21