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[PULL 27/41] hw/intc/pxa2xx: Factor pxa2xx_pic_realize() out of pxa2xx_p
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From: |
Peter Maydell |
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Subject: |
[PULL 27/41] hw/intc/pxa2xx: Factor pxa2xx_pic_realize() out of pxa2xx_pic_init() |
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Date: |
Fri, 27 Oct 2023 15:39:28 +0100 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20231020130331.50048-9-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/pxa2xx_pic.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index 7e180635c22..1373a0d275f 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -287,12 +287,18 @@ static void pxa2xx_pic_reset_hold(Object *obj)
DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
{
DeviceState *dev = qdev_new(TYPE_PXA2XX_PIC);
- PXA2xxPICState *s = PXA2XX_PIC(dev);
object_property_set_link(OBJECT(dev), "arm-cpu",
OBJECT(cpu), &error_abort);
-
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+
+ return dev;
+}
+
+static void pxa2xx_pic_realize(DeviceState *dev, Error **errp)
+{
+ PXA2xxPICState *s = PXA2XX_PIC(dev);
qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS);
@@ -300,12 +306,9 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_pic_ops, s,
"pxa2xx-pic", 0x00100000);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
/* Enable IC coprocessor access. */
- define_arm_cp_regs_with_opaque(cpu, pxa_pic_cp_reginfo, s);
-
- return dev;
+ define_arm_cp_regs_with_opaque(s->cpu, pxa_pic_cp_reginfo, s);
}
static const VMStateDescription vmstate_pxa2xx_pic_regs = {
@@ -335,6 +338,7 @@ static void pxa2xx_pic_class_init(ObjectClass *klass, void
*data)
ResettableClass *rc = RESETTABLE_CLASS(klass);
device_class_set_props(dc, pxa2xx_pic_properties);
+ dc->realize = pxa2xx_pic_realize;
dc->desc = "PXA2xx PIC";
dc->vmsd = &vmstate_pxa2xx_pic_regs;
rc->phases.hold = pxa2xx_pic_reset_hold;
--
2.34.1
- [PULL 32/41] hw/net/cadence_gem: use FIELD for screening registers, (continued)
- [PULL 32/41] hw/net/cadence_gem: use FIELD for screening registers, Peter Maydell, 2023/10/27
- [PULL 26/41] hw/intc/pxa2xx: Pass CPU reference using QOM link property, Peter Maydell, 2023/10/27
- [PULL 33/41] hw/net/cadence_gem: use FIELD to describe NWCTRL register fields, Peter Maydell, 2023/10/27
- [PULL 14/41] hw/arm/fsl-imx31: Remove 'hw/arm/boot.h' from header, Peter Maydell, 2023/10/27
- [PULL 25/41] hw/intc/pxa2xx: Convert to Resettable interface, Peter Maydell, 2023/10/27
- [PULL 39/41] hw/net/cadence_gem: use FIELD to describe PHYMNTNC register fields, Peter Maydell, 2023/10/27
- [PULL 34/41] hw/net/cadence_gem: use FIELD to describe NWCFG register fields, Peter Maydell, 2023/10/27
- [PULL 37/41] hw/net/cadence_gem: use FIELD to describe IRQ register fields, Peter Maydell, 2023/10/27
- [PULL 31/41] hw/net/cadence_gem: use REG32 macro for register definitions, Peter Maydell, 2023/10/27
- [PULL 35/41] hw/net/cadence_gem: use FIELD to describe DMACFG register fields, Peter Maydell, 2023/10/27
- [PULL 27/41] hw/intc/pxa2xx: Factor pxa2xx_pic_realize() out of pxa2xx_pic_init(),
Peter Maydell <=
- [PULL 41/41] hw/net/cadence_gem: enforce 32 bits variable size for CRC, Peter Maydell, 2023/10/27
- [PULL 28/41] hw/arm/pxa2xx: Realize PXA2XX_I2C device before accessing it, Peter Maydell, 2023/10/27
- [PULL 20/41] hw/sd/pxa2xx: Realize sysbus device before accessing it, Peter Maydell, 2023/10/27
- [PULL 38/41] hw/net/cadence_gem: use FIELD to describe DESCONF6 register fields, Peter Maydell, 2023/10/27
- [PULL 21/41] hw/sd/pxa2xx: Do not open-code sysbus_create_simple(), Peter Maydell, 2023/10/27
- [PULL 07/41] target/arm: Move ID_AA64PFR* tests together, Peter Maydell, 2023/10/27
- [PULL 40/41] hw/net/cadence_gem: perform PHY access on write only, Peter Maydell, 2023/10/27
- [PULL 36/41] hw/net/cadence_gem: use FIELD to describe [TX|RX]STATUS register fields, Peter Maydell, 2023/10/27
- Re: [PULL 00/41] target-arm queue, Stefan Hajnoczi, 2023/10/29