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[PATCH v2 16/35] tcg/loongarch64: Support TCG_COND_TST{EQ,NE}
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 16/35] tcg/loongarch64: Support TCG_COND_TST{EQ,NE} |
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Date: |
Sat, 28 Oct 2023 12:45:03 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 56 ++++++++++++++++++++++----------
1 file changed, 38 insertions(+), 18 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 384d2ba342..7770e1bfa0 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -556,6 +556,7 @@ static int tcg_out_setcond_int(TCGContext *s, TCGCond cond,
TCGReg ret,
case TCG_COND_GEU: /* -> LTU */
case TCG_COND_GT: /* -> LE */
case TCG_COND_GTU: /* -> LEU */
+ case TCG_COND_TSTEQ: /* -> TSTNE */
cond = tcg_invert_cond(cond);
flags ^= SETCOND_INV;
break;
@@ -612,6 +613,18 @@ static int tcg_out_setcond_int(TCGContext *s, TCGCond
cond, TCGReg ret,
}
break;
+ case TCG_COND_TSTNE:
+ flags |= SETCOND_NEZ;
+ if (!c2) {
+ tcg_out_opc_and(s, ret, arg1, arg2);
+ } else if (arg2 >= 0 && arg2 <= 0xfff) {
+ tcg_out_opc_andi(s, ret, arg1, arg2);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_TMP0, arg2);
+ tcg_out_opc_and(s, ret, arg1, TCG_REG_TMP0);
+ }
+ break;
+
case TCG_COND_LT:
case TCG_COND_LTU:
if (c2) {
@@ -696,29 +709,36 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond,
TCGReg ret,
* Branch helpers
*/
-static const struct {
- LoongArchInsn op;
- bool swap;
-} tcg_brcond_to_loongarch[] = {
- [TCG_COND_EQ] = { OPC_BEQ, false },
- [TCG_COND_NE] = { OPC_BNE, false },
- [TCG_COND_LT] = { OPC_BGT, true },
- [TCG_COND_GE] = { OPC_BLE, true },
- [TCG_COND_LE] = { OPC_BLE, false },
- [TCG_COND_GT] = { OPC_BGT, false },
- [TCG_COND_LTU] = { OPC_BGTU, true },
- [TCG_COND_GEU] = { OPC_BLEU, true },
- [TCG_COND_LEU] = { OPC_BLEU, false },
- [TCG_COND_GTU] = { OPC_BGTU, false }
-};
-
static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
TCGReg arg2, TCGLabel *l)
{
- LoongArchInsn op = tcg_brcond_to_loongarch[cond].op;
+ static const struct {
+ LoongArchInsn op;
+ bool swap;
+ } tcg_brcond_to_loongarch[16] = {
+ [TCG_COND_EQ] = { OPC_BEQ, false },
+ [TCG_COND_NE] = { OPC_BNE, false },
+ [TCG_COND_LT] = { OPC_BGT, true },
+ [TCG_COND_GE] = { OPC_BLE, true },
+ [TCG_COND_LE] = { OPC_BLE, false },
+ [TCG_COND_GT] = { OPC_BGT, false },
+ [TCG_COND_LTU] = { OPC_BGTU, true },
+ [TCG_COND_GEU] = { OPC_BLEU, true },
+ [TCG_COND_LEU] = { OPC_BLEU, false },
+ [TCG_COND_GTU] = { OPC_BGTU, false }
+ };
+ LoongArchInsn op;
+
+ if (is_tst_cond(cond)) {
+ tcg_out_opc_and(s, TCG_REG_TMP0, arg1, arg2);
+ arg1 = TCG_REG_TMP0;
+ arg2 = TCG_REG_ZERO;
+ cond = tcg_tst_eqne_cond(cond);
+ }
+
+ op = tcg_brcond_to_loongarch[cond].op
tcg_debug_assert(op != 0);
-
if (tcg_brcond_to_loongarch[cond].swap) {
TCGReg t = arg1;
arg1 = arg2;
--
2.34.1
- [PATCH v2 02/35] tcg/optimize: Split out arg_is_const_val, (continued)
- [PATCH v2 02/35] tcg/optimize: Split out arg_is_const_val, Richard Henderson, 2023/10/28
- [PATCH v2 04/35] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, Richard Henderson, 2023/10/28
- [PATCH v2 03/35] tcg/optimize: Split out do_constant_folding_cond1, Richard Henderson, 2023/10/28
- [PATCH v2 05/35] tcg/optimize: Split out arg_new_constant, Richard Henderson, 2023/10/28
- [PATCH v2 07/35] tcg: Add TCGConst argument to tcg_target_const_match, Richard Henderson, 2023/10/28
- [PATCH v2 09/35] tcg/aarch64: Generate TBZ, TBNZ, Richard Henderson, 2023/10/28
- [PATCH v2 08/35] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 10/35] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX, Richard Henderson, 2023/10/28
- [PATCH v2 06/35] tcg/optimize: Handle TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 24/35] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel, Richard Henderson, 2023/10/28
- [PATCH v2 16/35] tcg/loongarch64: Support TCG_COND_TST{EQ,NE},
Richard Henderson <=
- [PATCH v2 11/35] tcg/arm: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 26/35] tcg/ppc: Add TCG_CT_CONST_CMP, Richard Henderson, 2023/10/28
- [PATCH v2 14/35] tcg/i386: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 15/35] tcg/i386: Improve TSTNE/TESTEQ vs powers of two, Richard Henderson, 2023/10/28
- [PATCH v2 18/35] tcg/riscv: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 21/35] tcg/sparc64: Pass TCGCond to tcg_out_cmp, Richard Henderson, 2023/10/28
- [PATCH v2 25/35] tcg/ppc: Tidy up tcg_target_const_match, Richard Henderson, 2023/10/28
- [PATCH v2 28/35] tcg/s390x: Split constraint A into J+U, Richard Henderson, 2023/10/28
- [PATCH v2 32/35] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}, Richard Henderson, 2023/10/28
- [PATCH v2 33/35] target/alpha: Use TCG_COND_TST{EQ, NE} for CMOVLB{C, S}, Richard Henderson, 2023/10/28