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[PATCH v2 11/35] tcg/arm: Support TCG_COND_TST{EQ,NE}
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 11/35] tcg/arm: Support TCG_COND_TST{EQ,NE} |
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Date: |
Sat, 28 Oct 2023 12:44:58 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.c.inc | 59 ++++++++++++++++++++++++++++++----------
1 file changed, 44 insertions(+), 15 deletions(-)
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 0c29a3929b..0fc7273b16 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1191,6 +1191,33 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
}
}
+static TCGCond tcg_out_cmp(TCGContext *s, TCGCond cond, TCGReg a,
+ TCGArg b, int b_const)
+{
+ if (!is_tst_cond(cond)) {
+ tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0, a, b, b_const);
+ return cond;
+ }
+
+ cond = tcg_tst_eqne_cond(cond);
+ if (b_const) {
+ int imm12 = encode_imm(b);
+
+ /*
+ * The compare constraints allow rIN, but TST does not support N.
+ * Be prepared to load the constant into a scratch register.
+ */
+ if (imm12 >= 0) {
+ tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, a, imm12);
+ return cond;
+ }
+ tcg_out_movi32(s, COND_AL, TCG_REG_TMP, b);
+ b = TCG_REG_TMP;
+ }
+ tcg_out_dat_reg(s, COND_AL, ARITH_TST, 0, a, b, SHIFT_IMM_LSL(0));
+ return cond;
+}
+
static TCGCond tcg_out_cmp2(TCGContext *s, const TCGArg *args,
const int *const_args)
{
@@ -1218,6 +1245,13 @@ static TCGCond tcg_out_cmp2(TCGContext *s, const TCGArg
*args,
tcg_out_dat_rI(s, COND_EQ, ARITH_CMP, 0, al, bl, const_bl);
return cond;
+ case TCG_COND_TSTEQ:
+ case TCG_COND_TSTNE:
+ /* Similar, but with TST instead of CMP. */
+ tcg_out_dat_rI(s, COND_AL, ARITH_TST, 0, ah, bh, const_bh);
+ tcg_out_dat_rI(s, COND_EQ, ARITH_TST, 0, al, bl, const_bl);
+ return tcg_tst_eqne_cond(cond);
+
case TCG_COND_LT:
case TCG_COND_GE:
/* We perform a double-word subtraction and examine the result.
@@ -1806,9 +1840,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
/* Constraints mean that v2 is always in the same register as dest,
* so we only need to do "if condition passed, move v1 to dest".
*/
- tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0,
- args[1], args[2], const_args[2]);
- tcg_out_dat_rIK(s, tcg_cond_to_arm_cond[args[5]], ARITH_MOV,
+ c = tcg_out_cmp(s, args[5], args[1], args[2], const_args[2]);
+ tcg_out_dat_rIK(s, tcg_cond_to_arm_cond[c], ARITH_MOV,
ARITH_MVN, args[0], 0, args[3], const_args[3]);
break;
case INDEX_op_add_i32:
@@ -1958,25 +1991,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_brcond_i32:
- tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0,
- args[0], args[1], const_args[1]);
- tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[2]],
- arg_label(args[3]));
+ c = tcg_out_cmp(s, args[2], args[0], args[1], const_args[1]);
+ tcg_out_goto_label(s, tcg_cond_to_arm_cond[c], arg_label(args[3]));
break;
case INDEX_op_setcond_i32:
- tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0,
- args[1], args[2], const_args[2]);
- tcg_out_dat_imm(s, tcg_cond_to_arm_cond[args[3]],
+ c = tcg_out_cmp(s, args[3], args[1], args[2], const_args[2]);
+ tcg_out_dat_imm(s, tcg_cond_to_arm_cond[c],
ARITH_MOV, args[0], 0, 1);
- tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(args[3])],
+ tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(c)],
ARITH_MOV, args[0], 0, 0);
break;
case INDEX_op_negsetcond_i32:
- tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0,
- args[1], args[2], const_args[2]);
- tcg_out_dat_imm(s, tcg_cond_to_arm_cond[args[3]],
+ c = tcg_out_cmp(s, args[3], args[1], args[2], const_args[2]);
+ tcg_out_dat_imm(s, tcg_cond_to_arm_cond[c],
ARITH_MVN, args[0], 0, 0);
- tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(args[3])],
+ tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(c)],
ARITH_MOV, args[0], 0, 0);
break;
--
2.34.1
- [PATCH v2 04/35] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, (continued)
- [PATCH v2 04/35] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, Richard Henderson, 2023/10/28
- [PATCH v2 03/35] tcg/optimize: Split out do_constant_folding_cond1, Richard Henderson, 2023/10/28
- [PATCH v2 05/35] tcg/optimize: Split out arg_new_constant, Richard Henderson, 2023/10/28
- [PATCH v2 07/35] tcg: Add TCGConst argument to tcg_target_const_match, Richard Henderson, 2023/10/28
- [PATCH v2 09/35] tcg/aarch64: Generate TBZ, TBNZ, Richard Henderson, 2023/10/28
- [PATCH v2 08/35] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 10/35] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX, Richard Henderson, 2023/10/28
- [PATCH v2 06/35] tcg/optimize: Handle TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 24/35] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel, Richard Henderson, 2023/10/28
- [PATCH v2 16/35] tcg/loongarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 11/35] tcg/arm: Support TCG_COND_TST{EQ,NE},
Richard Henderson <=
- [PATCH v2 26/35] tcg/ppc: Add TCG_CT_CONST_CMP, Richard Henderson, 2023/10/28
- [PATCH v2 14/35] tcg/i386: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 15/35] tcg/i386: Improve TSTNE/TESTEQ vs powers of two, Richard Henderson, 2023/10/28
- [PATCH v2 18/35] tcg/riscv: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/28
- [PATCH v2 21/35] tcg/sparc64: Pass TCGCond to tcg_out_cmp, Richard Henderson, 2023/10/28
- [PATCH v2 25/35] tcg/ppc: Tidy up tcg_target_const_match, Richard Henderson, 2023/10/28
- [PATCH v2 28/35] tcg/s390x: Split constraint A into J+U, Richard Henderson, 2023/10/28
- [PATCH v2 32/35] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}, Richard Henderson, 2023/10/28
- [PATCH v2 33/35] target/alpha: Use TCG_COND_TST{EQ, NE} for CMOVLB{C, S}, Richard Henderson, 2023/10/28
- [PATCH v2 12/35] tcg/i386: Pass x86 condition codes to tcg_out_cmov, Richard Henderson, 2023/10/28