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[PATCH v2 13/21] target/sparc: Merge gen_branch2 into advance_pc
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 13/21] target/sparc: Merge gen_branch2 into advance_pc |
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Date: |
Tue, 31 Oct 2023 21:11:24 -0700 |
The function had only one caller. Canonicalize the cpu_cond
test to TCG_COND_NE, the "natural" sense of its value.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 2e7deb5e33..e134ba8821 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -908,19 +908,6 @@ static void gen_op_eval_fbo(TCGv dst, TCGv src, unsigned
int fcc_offset)
tcg_gen_xori_tl(dst, dst, 0x1);
}
-static void gen_branch2(DisasContext *dc, target_ulong pc1,
- target_ulong pc2, TCGv r_cond)
-{
- TCGLabel *l1 = gen_new_label();
-
- tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
-
- gen_goto_tb(dc, 0, pc1, pc1 + 4);
-
- gen_set_label(l1);
- gen_goto_tb(dc, 1, pc2, pc2 + 4);
-}
-
static void gen_generic_branch(DisasContext *dc)
{
TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]);
@@ -2352,6 +2339,8 @@ static int extract_qfpreg(DisasContext *dc, int x)
/* Default case for non jump instructions. */
static bool advance_pc(DisasContext *dc)
{
+ TCGLabel *l1;
+
if (dc->npc & 3) {
switch (dc->npc) {
case DYNAMIC_PC:
@@ -2359,11 +2348,22 @@ static bool advance_pc(DisasContext *dc)
dc->pc = dc->npc;
gen_op_next_insn();
break;
+
case JUMP_PC:
/* we can do a static jump */
- gen_branch2(dc, dc->jump_pc[0], dc->jump_pc[1], cpu_cond);
+ l1 = gen_new_label();
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cond, 0, l1);
+
+ /* jump not taken */
+ gen_goto_tb(dc, 1, dc->jump_pc[1], dc->jump_pc[1] + 4);
+
+ /* jump taken */
+ gen_set_label(l1);
+ gen_goto_tb(dc, 0, dc->jump_pc[0], dc->jump_pc[0] + 4);
+
dc->base.is_jmp = DISAS_NORETURN;
break;
+
default:
g_assert_not_reached();
}
--
2.34.1
- [PATCH v2 00/21] target/sparc: Cleanup condition codes etc, Richard Henderson, 2023/11/01
- [PATCH v2 01/21] target/sparc: Introduce cpu_put_psr_icc, Richard Henderson, 2023/11/01
- [PATCH v2 03/21] target/sparc: Remove CC_OP_LOGIC, Richard Henderson, 2023/11/01
- [PATCH v2 04/21] target/sparc: Remove CC_OP_DIV, Richard Henderson, 2023/11/01
- [PATCH v2 05/21] target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD, Richard Henderson, 2023/11/01
- [PATCH v2 02/21] target/sparc: Split psr and xcc into components, Richard Henderson, 2023/11/01
- [PATCH v2 06/21] target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB, Richard Henderson, 2023/11/01
- [PATCH v2 07/21] target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV, Richard Henderson, 2023/11/01
- [PATCH v2 13/21] target/sparc: Merge gen_branch2 into advance_pc,
Richard Henderson <=
- [PATCH v2 11/21] target/sparc: Always copy conditions into a new temporary, Richard Henderson, 2023/11/01
- [PATCH v2 08/21] target/sparc: Remove CC_OP leftovers, Richard Henderson, 2023/11/01
- [PATCH v2 09/21] target/sparc: Remove DisasCompare.is_bool, Richard Henderson, 2023/11/01
- [PATCH v2 14/21] target/sparc: Merge advance_jump_uncond_{never, always} into advance_jump_cond, Richard Henderson, 2023/11/01
- [PATCH v2 16/21] target/sparc: Merge gen_op_next_insn into only caller, Richard Henderson, 2023/11/01
- [PATCH v2 18/21] target/sparc: Discard cpu_cond at the end of each insn, Richard Henderson, 2023/11/01
- [PATCH v2 10/21] target/sparc: Change DisasCompare.c2 to int, Richard Henderson, 2023/11/01
- [PATCH v2 15/21] target/sparc: Pass displacement to advance_jump_cond, Richard Henderson, 2023/11/01
- [PATCH v2 17/21] target/sparc: Record entire jump condition in DisasContext, Richard Henderson, 2023/11/01
- [PATCH v2 12/21] target/sparc: Do flush_cond in advance_jump_cond, Richard Henderson, 2023/11/01