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[PULL 32/33] hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG device
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From: |
Peter Maydell |
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Subject: |
[PULL 32/33] hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG device |
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Date: |
Thu, 2 Nov 2023 17:38:34 +0000 |
From: Tong Ho <tong.ho@amd.com>
Connect the support for Versal True Random Number Generator
(TRNG) device.
Warning: unlike the TRNG component in a real device from the
Versal device familiy, the connected TRNG model is not of
cryptographic grade and is not intended for use cases when
cryptograpically strong TRNG is needed.
Signed-off-by: Tong Ho <tong.ho@amd.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20231031184611.3029156-3-tong.ho@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/xlnx-versal.h | 5 +++++
hw/arm/xlnx-versal.c | 16 ++++++++++++++++
hw/arm/Kconfig | 1 +
3 files changed, 22 insertions(+)
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index b710d71fb08..b24fa64557f 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -30,6 +30,7 @@
#include "hw/dma/xlnx_csu_dma.h"
#include "hw/misc/xlnx-versal-crl.h"
#include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
+#include "hw/misc/xlnx-versal-trng.h"
#include "hw/net/xlnx-versal-canfd.h"
#include "hw/misc/xlnx-versal-cfu.h"
#include "hw/misc/xlnx-versal-cframe-reg.h"
@@ -115,6 +116,7 @@ struct Versal {
} iou;
XlnxZynqMPRTC rtc;
+ XlnxVersalTRng trng;
XlnxBBRam bbram;
XlnxEFuse efuse;
XlnxVersalEFuseCtrl efuse_ctrl;
@@ -159,6 +161,7 @@ struct Versal {
#define VERSAL_OSPI_IRQ 124
#define VERSAL_SD0_IRQ_0 126
#define VERSAL_EFUSE_IRQ 139
+#define VERSAL_TRNG_IRQ 141
#define VERSAL_RTC_ALARM_IRQ 142
#define VERSAL_RTC_SECONDS_IRQ 143
@@ -328,4 +331,6 @@ struct Versal {
#define MM_PMC_CRP_SIZE 0x10000
#define MM_PMC_RTC 0xf12a0000
#define MM_PMC_RTC_SIZE 0x10000
+#define MM_PMC_TRNG 0xf1230000
+#define MM_PMC_TRNG_SIZE 0x10000
#endif
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index fa556d8764b..4f74a64a0d7 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -373,6 +373,21 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 0));
}
+static void versal_create_trng(Versal *s, qemu_irq *pic)
+{
+ SysBusDevice *sbd;
+ MemoryRegion *mr;
+
+ object_initialize_child(OBJECT(s), "trng", &s->pmc.trng,
+ TYPE_XLNX_VERSAL_TRNG);
+ sbd = SYS_BUS_DEVICE(&s->pmc.trng);
+ sysbus_realize(sbd, &error_fatal);
+
+ mr = sysbus_mmio_get_region(sbd, 0);
+ memory_region_add_subregion(&s->mr_ps, MM_PMC_TRNG, mr);
+ sysbus_connect_irq(sbd, 0, pic[VERSAL_TRNG_IRQ]);
+}
+
static void versal_create_xrams(Versal *s, qemu_irq *pic)
{
int nr_xrams = ARRAY_SIZE(s->lpd.xram.ctrl);
@@ -909,6 +924,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_sds(s, pic);
versal_create_pmc_apb_irq_orgate(s, pic);
versal_create_rtc(s, pic);
+ versal_create_trng(s, pic);
versal_create_xrams(s, pic);
versal_create_bbram(s, pic);
versal_create_efuse(s, pic);
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 841f3131ea5..e35007ed413 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -482,6 +482,7 @@ config XLNX_VERSAL
select XLNX_BBRAM
select XLNX_EFUSE_VERSAL
select XLNX_USB_SUBSYS
+ select XLNX_VERSAL_TRNG
config NPCM7XX
bool
--
2.34.1
- [PULL 17/33] hw/arm/pxa2xx_gpio: Pass CPU using QOM link property, (continued)
- [PULL 17/33] hw/arm/pxa2xx_gpio: Pass CPU using QOM link property, Peter Maydell, 2023/11/02
- [PULL 18/33] hw/watchdog/wdt_imx2: Trace MMIO access, Peter Maydell, 2023/11/02
- [PULL 08/33] docs/specs/vmw_pvscsi-spec: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 10/33] docs/specs/ivshmem-spec: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 14/33] docs/specs/vmcoreinfo: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 19/33] hw/watchdog/wdt_imx2: Trace timer activity, Peter Maydell, 2023/11/02
- [PULL 24/33] linux-user: Report AArch64 hwcap2 fields above bit 31, Peter Maydell, 2023/11/02
- [PULL 30/33] target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk, Peter Maydell, 2023/11/02
- [PULL 28/33] hw/char/stm32f2xx_usart: Update IRQ when DR is written, Peter Maydell, 2023/11/02
- [PULL 31/33] hw/misc: Introduce AMD/Xilix Versal TRNG device, Peter Maydell, 2023/11/02
- [PULL 32/33] hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG device,
Peter Maydell <=
- [PULL 12/33] docs/specs/standard-vga: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 20/33] hw/misc/imx7_snvs: Trace MMIO access, Peter Maydell, 2023/11/02
- [PULL 02/33] hw/input/stellaris_input: Rename to stellaris_gamepad, Peter Maydell, 2023/11/02
- [PULL 33/33] tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device, Peter Maydell, 2023/11/02
- [PULL 22/33] hw/i2c/pm_smbus: Convert DPRINTF to trace events, Peter Maydell, 2023/11/02
- [PULL 26/33] target/arm: Fix SVE STR increment, Peter Maydell, 2023/11/02
- [PULL 29/33] hw/char/stm32f2xx_usart: Add more definitions for CR1 register, Peter Maydell, 2023/11/02
- [PULL 13/33] docs/specs/virt-ctlr: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 25/33] target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly, Peter Maydell, 2023/11/02
- [PULL 16/33] MAINTAINERS: Make sure that gicv3_internal.h is covered, too, Peter Maydell, 2023/11/02