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[PULL 27/33] hw/char/stm32f2xx_usart: Extract common IRQ update code to
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From: |
Peter Maydell |
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Subject: |
[PULL 27/33] hw/char/stm32f2xx_usart: Extract common IRQ update code to update_irq() |
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Date: |
Thu, 2 Nov 2023 17:38:29 +0000 |
From: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Message-id: 20231030151528.1138131-2-hans-erik.floryd@rt-labs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/char/stm32f2xx_usart.c | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index fde67f4f03f..519d3461a33 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -53,6 +53,17 @@ static int stm32f2xx_usart_can_receive(void *opaque)
return 0;
}
+static void stm32f2xx_update_irq(STM32F2XXUsartState *s)
+{
+ uint32_t mask = s->usart_sr & s->usart_cr1;
+
+ if (mask & (USART_SR_TXE | USART_SR_TC | USART_SR_RXNE)) {
+ qemu_set_irq(s->irq, 1);
+ } else {
+ qemu_set_irq(s->irq, 0);
+ }
+}
+
static void stm32f2xx_usart_receive(void *opaque, const uint8_t *buf, int size)
{
STM32F2XXUsartState *s = opaque;
@@ -66,9 +77,7 @@ static void stm32f2xx_usart_receive(void *opaque, const
uint8_t *buf, int size)
s->usart_dr = *buf;
s->usart_sr |= USART_SR_RXNE;
- if (s->usart_cr1 & USART_CR1_RXNEIE) {
- qemu_set_irq(s->irq, 1);
- }
+ stm32f2xx_update_irq(s);
DB_PRINT("Receiving: %c\n", s->usart_dr);
}
@@ -85,7 +94,7 @@ static void stm32f2xx_usart_reset(DeviceState *dev)
s->usart_cr3 = 0x00000000;
s->usart_gtpr = 0x00000000;
- qemu_set_irq(s->irq, 0);
+ stm32f2xx_update_irq(s);
}
static uint64_t stm32f2xx_usart_read(void *opaque, hwaddr addr,
@@ -106,7 +115,7 @@ static uint64_t stm32f2xx_usart_read(void *opaque, hwaddr
addr,
retvalue = s->usart_dr & 0x3FF;
s->usart_sr &= ~USART_SR_RXNE;
qemu_chr_fe_accept_input(&s->chr);
- qemu_set_irq(s->irq, 0);
+ stm32f2xx_update_irq(s);
return retvalue;
case USART_BRR:
return s->usart_brr;
@@ -145,9 +154,7 @@ static void stm32f2xx_usart_write(void *opaque, hwaddr addr,
} else {
s->usart_sr &= value;
}
- if (!(s->usart_sr & USART_SR_RXNE)) {
- qemu_set_irq(s->irq, 0);
- }
+ stm32f2xx_update_irq(s);
return;
case USART_DR:
if (value < 0xF000) {
@@ -168,10 +175,7 @@ static void stm32f2xx_usart_write(void *opaque, hwaddr
addr,
return;
case USART_CR1:
s->usart_cr1 = value;
- if (s->usart_cr1 & USART_CR1_RXNEIE &&
- s->usart_sr & USART_SR_RXNE) {
- qemu_set_irq(s->irq, 1);
- }
+ stm32f2xx_update_irq(s);
return;
case USART_CR2:
s->usart_cr2 = value;
--
2.34.1
- [PULL 33/33] tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device, (continued)
- [PULL 33/33] tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device, Peter Maydell, 2023/11/02
- [PULL 22/33] hw/i2c/pm_smbus: Convert DPRINTF to trace events, Peter Maydell, 2023/11/02
- [PULL 26/33] target/arm: Fix SVE STR increment, Peter Maydell, 2023/11/02
- [PULL 29/33] hw/char/stm32f2xx_usart: Add more definitions for CR1 register, Peter Maydell, 2023/11/02
- [PULL 13/33] docs/specs/virt-ctlr: Convert to rST, Peter Maydell, 2023/11/02
- [PULL 25/33] target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly, Peter Maydell, 2023/11/02
- [PULL 16/33] MAINTAINERS: Make sure that gicv3_internal.h is covered, too, Peter Maydell, 2023/11/02
- [PULL 04/33] qdev: Add qdev_prop_set_array(), Peter Maydell, 2023/11/02
- [PULL 21/33] hw/misc/imx6_ccm: Convert DPRINTF to trace events, Peter Maydell, 2023/11/02
- [PULL 23/33] target/arm: Enable FEAT_MOPS insns in user-mode emulation, Peter Maydell, 2023/11/02
- [PULL 27/33] hw/char/stm32f2xx_usart: Extract common IRQ update code to update_irq(),
Peter Maydell <=
- Re: [PULL 00/33] target-arm queue, Stefan Hajnoczi, 2023/11/02