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[PULL 61/85] target/hppa: Implement HADD
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From: |
Richard Henderson |
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Subject: |
[PULL 61/85] target/hppa: Implement HADD |
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Date: |
Mon, 6 Nov 2023 19:03:43 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/helper.h | 3 +++
target/hppa/insns.decode | 8 +++++++-
target/hppa/op_helper.c | 32 ++++++++++++++++++++++++++++++++
target/hppa/translate.c | 37 +++++++++++++++++++++++++++++++++++++
4 files changed, 79 insertions(+), 1 deletion(-)
diff --git a/target/hppa/helper.h b/target/hppa/helper.h
index 57ea5447b6..db662f0c33 100644
--- a/target/hppa/helper.h
+++ b/target/hppa/helper.h
@@ -14,6 +14,9 @@ DEF_HELPER_FLAGS_3(stdby_e_parallel, TCG_CALL_NO_WG, void,
env, tl, tl)
DEF_HELPER_FLAGS_1(ldc_check, TCG_CALL_NO_RWG, void, tl)
+DEF_HELPER_FLAGS_2(hadd_ss, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(hadd_us, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+
DEF_HELPER_FLAGS_4(probe, TCG_CALL_NO_WG, tl, env, tl, i32, i32)
DEF_HELPER_FLAGS_1(loaded_fr0, TCG_CALL_NO_RWG, void, env)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index 820049b0c5..4bcfc94b1c 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -65,6 +65,7 @@
&ldst t b x disp sp m scale size
&rr_cf_d t r cf d
+&rrr t r1 r2
&rrr_cf t r1 r2 cf
&rrr_cf_d t r1 r2 cf d
&rrr_cf_d_sh t r1 r2 cf d sh
@@ -81,6 +82,7 @@
####
@rr_cf_d ...... r:5 ..... cf:4 ...... d:1 t:5 &rr_cf_d
+@rrr ...... r2:5 r1:5 .... ....... t:5 &rrr
@rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf
@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d
@rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 d:1 t:5 &rrr_cf_d_sh
@@ -208,6 +210,10 @@ subi_tsv 100101 ..... ..... .... 1 ...........
@rri_cf
cmpiclr 100100 ..... ..... .... . ........... @rri_cf_d
+hadd 000010 ..... ..... 00000011 11 0 ..... @rrr
+hadd_ss 000010 ..... ..... 00000011 01 0 ..... @rrr
+hadd_us 000010 ..... ..... 00000011 00 0 ..... @rrr
+
####
# Index Mem
####
@@ -429,7 +435,7 @@ fmpyfadd_d 101110 rm1:5 rm2:5 ... 0 1 ..0 0 0 neg:1
t:5 ra3=%rc32
@f0e_f_3 ...... ..... ..... ... .0 110 ..0 ..... \
&fclass3 r1=%ra64 r2=%rb64 t=%rt64
-@f0e_d_3 ...... r1:5 r2:5 ... 01 110 000 t:5
+@f0e_d_3 ...... r1:5 r2:5 ... 01 110 000 t:5 &fclass3
# Floating point class 0
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index a25e6df7e4..d93801ca47 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -377,3 +377,35 @@ target_ulong HELPER(read_interval_timer)(void)
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
#endif
}
+
+uint64_t HELPER(hadd_ss)(uint64_t r1, uint64_t r2)
+{
+ uint64_t ret = 0;
+
+ for (int i = 0; i < 64; i += 16) {
+ int f1 = sextract64(r1, i, 16);
+ int f2 = sextract64(r2, i, 16);
+ int fr = f1 + f2;
+
+ fr = MIN(fr, INT16_MAX);
+ fr = MAX(fr, INT16_MIN);
+ ret = deposit64(ret, i, 16, fr);
+ }
+ return ret;
+}
+
+uint64_t HELPER(hadd_us)(uint64_t r1, uint64_t r2)
+{
+ uint64_t ret = 0;
+
+ for (int i = 0; i < 64; i += 16) {
+ int f1 = extract64(r1, i, 16);
+ int f2 = sextract64(r2, i, 16);
+ int fr = f1 + f2;
+
+ fr = MIN(fr, UINT16_MAX);
+ fr = MAX(fr, 0);
+ ret = deposit64(ret, i, 16, fr);
+ }
+ return ret;
+}
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 1d749e2a78..dc8e37f99c 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -23,6 +23,7 @@
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
#include "tcg/tcg-op.h"
+#include "tcg/tcg-op-gvec.h"
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
#include "exec/translator.h"
@@ -2767,6 +2768,42 @@ static bool trans_cmpiclr(DisasContext *ctx,
arg_rri_cf_d *a)
return nullify_end(ctx);
}
+static bool do_multimedia(DisasContext *ctx, arg_rrr *a,
+ void (*fn)(TCGv_i64, TCGv_i64, TCGv_i64))
+{
+ TCGv_i64 r1, r2, dest;
+
+ if (!ctx->is_pa20) {
+ return false;
+ }
+
+ nullify_over(ctx);
+
+ r1 = load_gpr(ctx, a->r1);
+ r2 = load_gpr(ctx, a->r2);
+ dest = dest_gpr(ctx, a->t);
+
+ fn(dest, r1, r2);
+ save_gpr(ctx, a->t, dest);
+
+ return nullify_end(ctx);
+}
+
+static bool trans_hadd(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, tcg_gen_vec_add16_i64);
+}
+
+static bool trans_hadd_ss(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_helper_hadd_ss);
+}
+
+static bool trans_hadd_us(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_helper_hadd_us);
+}
+
static bool trans_ld(DisasContext *ctx, arg_ldst *a)
{
if (!ctx->is_pa20 && a->size > MO_32) {
--
2.34.1
- [PULL 68/85] target/hppa: Fix interruption based on default PSW, (continued)
- [PULL 68/85] target/hppa: Fix interruption based on default PSW, Richard Henderson, 2023/11/06
- [PULL 69/85] target/hppa: Precompute zero into DisasContext, Richard Henderson, 2023/11/06
- [PULL 73/85] linux-user/hppa: Drop EXCP_DUMP from handled exceptions, Richard Henderson, 2023/11/06
- [PULL 72/85] hw/hppa: Translate phys addresses for the cpu, Richard Henderson, 2023/11/06
- [PULL 78/85] target/hppa: Add unwind_breg to CPUHPPAState, Richard Henderson, 2023/11/06
- [PULL 77/85] target/hppa: Clear upper bits in mtctl for pa1.x, Richard Henderson, 2023/11/06
- [PULL 75/85] target/hppa: Add pa2.0 cpu local tlb flushes, Richard Henderson, 2023/11/06
- [PULL 71/85] include/hw/elf: Remove truncating signed casts, Richard Henderson, 2023/11/06
- [PULL 65/85] target/hppa: Implement HSHLADD, HSHRADD, Richard Henderson, 2023/11/06
- [PULL 61/85] target/hppa: Implement HADD,
Richard Henderson <=
- [PULL 76/85] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system, Richard Henderson, 2023/11/06
- [PULL 79/85] target/hppa: Create raise_exception_with_ior, Richard Henderson, 2023/11/06
- [PULL 82/85] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region, Richard Henderson, 2023/11/06
- [PULL 84/85] hw/hppa: Turn on 64-bit CPU for C3700 machine, Richard Henderson, 2023/11/06
- [PULL 85/85] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only, Richard Henderson, 2023/11/06
- [PULL 81/85] target/hppa: Improve interrupt logging, Richard Henderson, 2023/11/06
- [PULL 80/85] target/hppa: Update IIAOQ, IIASQ for pa2.0, Richard Henderson, 2023/11/06
- [PULL 83/85] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory, Richard Henderson, 2023/11/06
- Re: [PULL 00/85] target/hppa patch queue, Stefan Hajnoczi, 2023/11/07