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[PULL 59/63] hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/wr
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From: |
Michael S. Tsirkin |
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Subject: |
[PULL 59/63] hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions |
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Date: |
Tue, 7 Nov 2023 05:13:47 -0500 |
From: Gregory Price <gourry.memverge@gmail.com>
Call CXL_TYPE3 once at top of function to avoid multiple invocations.
Signed-off-by: Gregory Price <gregory.price@memverge.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20231023160806.13206-16-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/mem/cxl_type3.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index cc8220592f..a766c64575 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -888,17 +888,18 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d,
MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_addr, uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
+ CXLType3Dev *ct3d = CXL_TYPE3(d);
uint64_t dpa_offset = 0;
AddressSpace *as = NULL;
int res;
- res = cxl_type3_hpa_to_as_and_dpa(CXL_TYPE3(d), host_addr, size,
+ res = cxl_type3_hpa_to_as_and_dpa(ct3d, host_addr, size,
&as, &dpa_offset);
if (res) {
return MEMTX_ERROR;
}
- if (sanitize_running(&CXL_TYPE3(d)->cci)) {
+ if (sanitize_running(&ct3d->cci)) {
qemu_guest_getrandom_nofail(data, size);
return MEMTX_OK;
}
@@ -909,17 +910,18 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr
host_addr, uint64_t *data,
MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data,
unsigned size, MemTxAttrs attrs)
{
+ CXLType3Dev *ct3d = CXL_TYPE3(d);
uint64_t dpa_offset = 0;
AddressSpace *as = NULL;
int res;
- res = cxl_type3_hpa_to_as_and_dpa(CXL_TYPE3(d), host_addr, size,
+ res = cxl_type3_hpa_to_as_and_dpa(ct3d, host_addr, size,
&as, &dpa_offset);
if (res) {
return MEMTX_ERROR;
}
- if (sanitize_running(&CXL_TYPE3(d)->cci)) {
+ if (sanitize_running(&ct3d->cci)) {
return MEMTX_OK;
}
--
MST
- [PULL 52/63] hw/cxl/mbox: Add Physical Switch Identify command., (continued)
- [PULL 52/63] hw/cxl/mbox: Add Physical Switch Identify command., Michael S. Tsirkin, 2023/11/07
- [PULL 54/63] hw/cxl: Implement Physical Ports status retrieval, Michael S. Tsirkin, 2023/11/07
- [PULL 51/63] hw/cxl/mbox: Add Information and Status / Identify command, Michael S. Tsirkin, 2023/11/07
- [PULL 55/63] hw/cxl/mbox: Add support for background operations, Michael S. Tsirkin, 2023/11/07
- [PULL 56/63] hw/cxl/mbox: Wire up interrupts for background completion, Michael S. Tsirkin, 2023/11/07
- [PULL 57/63] hw/cxl: Add support for device sanitation, Michael S. Tsirkin, 2023/11/07
- [PULL 59/63] hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions,
Michael S. Tsirkin <=
- [PULL 60/63] hw/cxl: Add dummy security state get, Michael S. Tsirkin, 2023/11/07
- [PULL 61/63] hw/cxl: Add tunneled command support to mailbox for switch cci., Michael S. Tsirkin, 2023/11/07
- [PULL 58/63] hw/cxl/mbox: Add Get Background Operation Status Command, Michael S. Tsirkin, 2023/11/07
- [PULL 63/63] acpi/tests/avocado/bits: enable console logging from bits VM, Michael S. Tsirkin, 2023/11/07
- [PULL 62/63] acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point, Michael S. Tsirkin, 2023/11/07
- [PULL 23/63] vdpa: Allow VIRTIO_NET_F_RSS in SVQ, Michael S. Tsirkin, 2023/11/07
- Re: [PULL 00/63] virtio,pc,pci: features, fixes, Stefan Hajnoczi, 2023/11/07