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[PATCH v3 23/70] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpu
From: |
Xiaoyao Li |
Subject: |
[PATCH v3 23/70] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup |
Date: |
Wed, 15 Nov 2023 02:14:32 -0500 |
Some bits in TD attributes have corresponding CPUID feature bits. Reflect
the fixed0/1 restriction on TD attributes to their corresponding CPUID
bits in tdx_cpuid_lookup[] as well.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/cpu-internal.h | 9 +++++++++
target/i386/cpu.c | 9 ---------
target/i386/cpu.h | 2 ++
target/i386/kvm/tdx.c | 21 +++++++++++++++++++++
4 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h
index 9baac5c0b450..e980f6e3147f 100644
--- a/target/i386/cpu-internal.h
+++ b/target/i386/cpu-internal.h
@@ -20,6 +20,15 @@
#ifndef I386_CPU_INTERNAL_H
#define I386_CPU_INTERNAL_H
+typedef struct FeatureMask {
+ FeatureWord index;
+ uint64_t mask;
+} FeatureMask;
+
+typedef struct FeatureDep {
+ FeatureMask from, to;
+} FeatureDep;
+
typedef enum FeatureWordType {
CPUID_FEATURE_WORD,
MSR_FEATURE_WORD,
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 128b01054ff3..e66b7a8b7b8d 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1442,15 +1442,6 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
};
-typedef struct FeatureMask {
- FeatureWord index;
- uint64_t mask;
-} FeatureMask;
-
-typedef struct FeatureDep {
- FeatureMask from, to;
-} FeatureDep;
-
static FeatureDep feature_dependencies[] = {
{
.from = { FEAT_7_0_EDX, CPUID_7_0_EDX_ARCH_CAPABILITIES },
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index d0b7ba5d113e..23265d890074 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -876,6 +876,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
#define CPUID_7_0_ECX_MAWAU (31U << 17)
/* Read Processor ID */
#define CPUID_7_0_ECX_RDPID (1U << 22)
+/* KeyLocker */
+#define CPUID_7_0_ECX_KeyLocker (1U << 23)
/* Bus Lock Debug Exception */
#define CPUID_7_0_ECX_BUS_LOCK_DETECT (1U << 24)
/* Cache Line Demote Instruction */
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index be7771bd97d7..1f5d8117d1a9 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -32,6 +32,13 @@
(1U << KVM_FEATURE_PV_SCHED_YIELD) | \
(1U << KVM_FEATURE_MSI_EXT_DEST_ID))
+#define TDX_ATTRIBUTES_MAX_BITS 64
+
+static FeatureMask tdx_attrs_ctrl_fields[TDX_ATTRIBUTES_MAX_BITS] = {
+ [30] = { .index = FEAT_7_0_ECX, .mask = CPUID_7_0_ECX_PKS },
+ [31] = { .index = FEAT_7_0_ECX, .mask = CPUID_7_0_ECX_KeyLocker},
+};
+
typedef struct KvmTdxCpuidLookup {
uint32_t tdx_fixed0;
uint32_t tdx_fixed1;
@@ -380,6 +387,8 @@ static void update_tdx_cpuid_lookup_by_tdx_caps(void)
FeatureWordInfo *fi;
uint32_t config;
FeatureWord w;
+ FeatureMask *fm;
+ int i;
/*
* Patch tdx_fixed0/1 by tdx_caps that what TDX module reports as
@@ -401,6 +410,18 @@ static void update_tdx_cpuid_lookup_by_tdx_caps(void)
entry->tdx_fixed1 &= ~config;
}
+ for (i = 0; i < ARRAY_SIZE(tdx_attrs_ctrl_fields); i++) {
+ fm = &tdx_attrs_ctrl_fields[i];
+
+ if (tdx_caps->attrs_fixed0 & (1ULL << i)) {
+ tdx_cpuid_lookup[fm->index].tdx_fixed0 |= fm->mask;
+ }
+
+ if (tdx_caps->attrs_fixed1 & (1ULL << i)) {
+ tdx_cpuid_lookup[fm->index].tdx_fixed1 |= fm->mask;
+ }
+ }
+
/*
* Because KVM gets XFAM settings via CPUID leaves 0xD, map
* tdx_caps->xfam_fixed{0, 1} into tdx_cpuid_lookup[].tdx_fixed{0, 1}.
--
2.34.1
- [PATCH v3 15/70] target/i386: Parse TDX vm type, (continued)
- [PATCH v3 15/70] target/i386: Parse TDX vm type, Xiaoyao Li, 2023/11/15
- [PATCH v3 11/70] trace/kvm: Add trace for page convertion between shared and private, Xiaoyao Li, 2023/11/15
- [PATCH v3 16/70] target/i386: Introduce kvm_confidential_guest_init(), Xiaoyao Li, 2023/11/15
- [PATCH v3 17/70] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context, Xiaoyao Li, 2023/11/15
- [PATCH v3 18/70] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES, Xiaoyao Li, 2023/11/15
- [PATCH v3 19/70] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object, Xiaoyao Li, 2023/11/15
- [PATCH v3 20/70] i386/tdx: Adjust the supported CPUID based on TDX restrictions, Xiaoyao Li, 2023/11/15
- [PATCH v3 21/70] i386/tdx: Update tdx_cpuid_lookup[].tdx_fixed0/1 by tdx_caps.cpuid_config[], Xiaoyao Li, 2023/11/15
- [PATCH v3 22/70] i386/tdx: Integrate tdx_caps->xfam_fixed0/1 into tdx_cpuid_lookup, Xiaoyao Li, 2023/11/15
- [PATCH v3 23/70] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup,
Xiaoyao Li <=
- [PATCH v3 24/70] i386/kvm: Move architectural CPUID leaf generation to separate helper, Xiaoyao Li, 2023/11/15
- [PATCH v3 25/70] kvm: Introduce kvm_arch_pre_create_vcpu(), Xiaoyao Li, 2023/11/15
- [PATCH v3 26/70] i386/tdx: Initialize TDX before creating TD vcpus, Xiaoyao Li, 2023/11/15
- [PATCH v3 27/70] i386/tdx: Add property sept-ve-disable for tdx-guest object, Xiaoyao Li, 2023/11/15
- [PATCH v3 28/70] i386/tdx: Make sept_ve_disable set by default, Xiaoyao Li, 2023/11/15
- [PATCH v3 29/70] i386/tdx: Wire CPU features up with attributes of TD guest, Xiaoyao Li, 2023/11/15
- [PATCH v3 30/70] i386/tdx: Validate TD attributes, Xiaoyao Li, 2023/11/15
- [PATCH v3 31/70] i386/tdx: Allows mrconfigid/mrowner/mrownerconfig for TDX_INIT_VM, Xiaoyao Li, 2023/11/15