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[PATCH v1 2/2] hw/mem/cxl_type3: allocate more vectors for MSI-X
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From: |
Hyeonggon Yoo |
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Subject: |
[PATCH v1 2/2] hw/mem/cxl_type3: allocate more vectors for MSI-X |
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Date: |
Mon, 27 Nov 2023 19:58:30 +0900 |
commit 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background
completion") enables notifying background command completion via MSI-X
interrupt (vector number 9).
However, the commit uses vector number 9 but the maximum number of
entries is less thus resulting in error below. Fix it by passing
nentries = 10 when calling msix_init_exclusive_bar().
# echo 1 > sanitize
Background command 4400h finished: success
qemu-system-x86_64: ../hw/pci/msix.c:529: msix_notify: Assertion `vector <
dev->msix_entries_nr' failed.
Fixes: 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background
completion")
Signed-off-by: Hyeonggon Yoo <42.hyeyoo@gmail.com>
---
hw/mem/cxl_type3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 52647b4ac7..72d9371347 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -685,7 +685,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
ComponentRegisters *regs = &cxl_cstate->crb;
MemoryRegion *mr = ®s->component_registers;
uint8_t *pci_conf = pci_dev->config;
- unsigned short msix_num = 6;
+ unsigned short msix_num = 10;
int i, rc;
QTAILQ_INIT(&ct3d->error_list);
--
2.39.1
Re: [PATCH v1 0/2] A Fixup for "QEMU: CXL mailbox rework and features (Part 1)", Michael S. Tsirkin, 2023/11/28