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[PULL 08/13] hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on fin
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From: |
Peter Maydell |
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Subject: |
[PULL 08/13] hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize() |
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Date: |
Mon, 27 Nov 2023 17:08:18 +0000 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 68fbcc344e added:
DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits,
qdev_prop_uint32, uint32_t),
but forgot to free the 'ro_bits' array. Do it in the instance_finalize
handler.
Cc: qemu-stable@nongnu.org
Fixes: 68fbcc344e ("hw/nvram: Introduce Xilinx eFuse QOM") # v6.2.0+
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231121174051.63038-5-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/nvram/xlnx-efuse.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
index 655c40b8d1e..f7b849f7de4 100644
--- a/hw/nvram/xlnx-efuse.c
+++ b/hw/nvram/xlnx-efuse.c
@@ -224,6 +224,13 @@ static void efuse_realize(DeviceState *dev, Error **errp)
}
}
+static void efuse_finalize(Object *obj)
+{
+ XlnxEFuse *s = XLNX_EFUSE(obj);
+
+ g_free(s->ro_bits);
+}
+
static void efuse_prop_set_drive(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
@@ -280,6 +287,7 @@ static const TypeInfo efuse_info = {
.name = TYPE_XLNX_EFUSE,
.parent = TYPE_DEVICE,
.instance_size = sizeof(XlnxEFuse),
+ .instance_finalize = efuse_finalize,
.class_init = efuse_class_init,
};
--
2.34.1
- [PULL 00/13] target-arm queue, Peter Maydell, 2023/11/27
- [PULL 01/13] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes, Peter Maydell, 2023/11/27
- [PULL 03/13] hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOs, Peter Maydell, 2023/11/27
- [PULL 06/13] hw/virtio: Free VirtIOIOMMUPCI::vdev.reserved_regions[] on finalize(), Peter Maydell, 2023/11/27
- [PULL 04/13] hw/net/can/xlnx-zynqmp: Avoid underflow while popping RX FIFO, Peter Maydell, 2023/11/27
- [PULL 07/13] hw/misc/mps2-scc: Free MPS2SCC::oscclk[] array on finalize(), Peter Maydell, 2023/11/27
- [PULL 05/13] hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize field, Peter Maydell, 2023/11/27
- [PULL 12/13] hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models, Peter Maydell, 2023/11/27
- [PULL 09/13] hw/nvram/xlnx-efuse-ctrl: Free XlnxVersalEFuseCtrl[] "pg0-lock" array, Peter Maydell, 2023/11/27
- [PULL 02/13] target/arm: Handle overflow in calculation of next timer tick, Peter Maydell, 2023/11/27
- [PULL 08/13] hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize(),
Peter Maydell <=
- [PULL 10/13] hw/input/stellaris_gamepad: Free StellarisGamepad::keycodes[] array, Peter Maydell, 2023/11/27
- [PULL 13/13] hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMA, Peter Maydell, 2023/11/27
- [PULL 11/13] hw/ssi/xilinx_spips: fix an out of bound access, Peter Maydell, 2023/11/27
- Re: [PULL 00/13] target-arm queue, Stefan Hajnoczi, 2023/11/28
- Re: [PULL 00/13] target-arm queue, Stefan Hajnoczi, 2023/11/28