Re: [PATCH 3/9] intc/grlib_irqmp: implements the multiprocessor status register

[Clément Chigot]

On Fri, Jan 5, 2024 at 2:37 PM Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> On 5/1/24 14:23, Clément Chigot wrote:
> > On Fri, Jan 5, 2024 at 12:32 PM Philippe Mathieu-Daudé
> > <philmd@linaro.org> wrote:
> >>
> >> Hi Clément,
> >>
> >> On 5/1/24 11:24, Clément Chigot wrote:
> >>> This implements the multiprocessor status register in grlib-irqmp and bind
> >>> it to a start signal, which will be later wired in leon3-generic to
> >>> start a cpu.
> >>>
> >>> Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr>
> >>> Signed-off-by: Clément Chigot <chigot@adacore.com>
> >>> ---
> >>>    hw/intc/grlib_irqmp.c | 22 +++++++++++++++++++---
> >>>    1 file changed, 19 insertions(+), 3 deletions(-)
> >>
> >>
> >>> @@ -323,6 +334,8 @@ static void grlib_irqmp_reset(DeviceState *d)
> >>>
> >>>        memset(irqmp->state, 0, sizeof *irqmp->state);
> >>>        irqmp->state->parent = irqmp;
> >>> +    irqmp->state->mpstatus = ((irqmp->ncpus - 1) << 28)
> >>
> >> Can you #define this magic '28' number?
> >>
> >>> +        | ((1 << irqmp->ncpus) - 2);
> >>>    }
> >>>
> >>>    static void grlib_irqmp_realize(DeviceState *dev, Error **errp)
> >>> @@ -336,6 +349,9 @@ static void grlib_irqmp_realize(DeviceState *dev, 
> >>> Error **errp)
> >>>        }
> >>>
> >>>        qdev_init_gpio_in(dev, grlib_irqmp_set_irq, MAX_PILS);
> >>> +    /* Transitionning from 0 to 1 starts the CPUs.  */
> >>
> >> What about 1 -> 0?
> >
> > It does nothing. I have updated the comment to mention it.
> > For the doc (also mention it in the commit message now).
> >    | [15:1] Power-down status of CPU [n]: reads ‘1’ = power-down, ‘0’ = 
> > running.
> >    | Write to start processor n: ‘1’=to start ‘0'=has no effect.
>
> Then grlib_irqmp_write() could be simplified as:
>
>       case MP_STATUS_OFFSET:
> -        /* Read Only (no SMP support) */
> +        state->mpstatus = deposit32(state->mpstatus,
> +                                    value, 0, IRQMP_MAX_CPU);
> +        for (unsigned i = 0; i < irqmp->ncpus; i++) {
> +            qemu_set_irq(irqmp->start_signal[i],
> +                         extract32(value, i, 1));
> +        }
>           return;

No, because the logic between write and read is reversed.
Writing "1" starts the CPU but reading 1 means that the CPU is not
started. Therefore, when writing 1, we must trigger the start signal
and then write 0 in mpstatus.