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[PULL 16/41] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H
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From: |
Peter Maydell |
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Subject: |
[PULL 16/41] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0 |
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Date: |
Thu, 11 Jan 2024 11:04:40 +0000 |
The alias registers like SCTLR_EL12 only exist when HCR_EL2.E2H
is 1; they should UNDEF otherwise. We weren't implementing this.
Add an intercept of the accessfn for these aliases, and implement
the UNDEF check.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
---
target/arm/cpregs.h | 3 ++-
target/arm/helper.c | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h
index f1293d16c07..e748d184cb6 100644
--- a/target/arm/cpregs.h
+++ b/target/arm/cpregs.h
@@ -937,7 +937,7 @@ struct ARMCPRegInfo {
CPResetFn *resetfn;
/*
- * "Original" writefn and readfn.
+ * "Original" readfn, writefn, accessfn.
* For ARMv8.1-VHE register aliases, we overwrite the read/write
* accessor functions of various EL1/EL0 to perform the runtime
* check for which sysreg should actually be modified, and then
@@ -948,6 +948,7 @@ struct ARMCPRegInfo {
*/
CPReadFn *orig_readfn;
CPWriteFn *orig_writefn;
+ CPAccessFn *orig_accessfn;
};
/*
diff --git a/target/arm/helper.c b/target/arm/helper.c
index dc2471eda7e..797b7518f61 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6535,6 +6535,20 @@ static void el2_e2h_e12_write(CPUARMState *env, const
ARMCPRegInfo *ri,
return ri->orig_writefn(env, ri->opaque, value);
}
+static CPAccessResult el2_e2h_e12_access(CPUARMState *env,
+ const ARMCPRegInfo *ri,
+ bool isread)
+{
+ /* FOO_EL12 aliases only exist when E2H is 1; otherwise they UNDEF */
+ if (!(arm_hcr_el2_eff(env) & HCR_E2H)) {
+ return CP_ACCESS_TRAP_UNCATEGORIZED;
+ }
+ if (ri->orig_accessfn) {
+ return ri->orig_accessfn(env, ri->opaque, isread);
+ }
+ return CP_ACCESS_OK;
+}
+
static void define_arm_vh_e2h_redirects_aliases(ARMCPU *cpu)
{
struct E2HAlias {
@@ -6648,6 +6662,7 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU
*cpu)
new_reg->opaque = src_reg;
new_reg->orig_readfn = src_reg->readfn ?: raw_read;
new_reg->orig_writefn = src_reg->writefn ?: raw_write;
+ new_reg->orig_accessfn = src_reg->accessfn;
if (!new_reg->raw_readfn) {
new_reg->raw_readfn = raw_read;
}
@@ -6656,6 +6671,7 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU
*cpu)
}
new_reg->readfn = el2_e2h_e12_read;
new_reg->writefn = el2_e2h_e12_write;
+ new_reg->accessfn = el2_e2h_e12_access;
ok = g_hash_table_insert(cpu->cp_regs,
(gpointer)(uintptr_t)a->new_key, new_reg);
--
2.34.1
- [PULL 06/41] hw/arm/socs: configure priority bits for existing SOCs, (continued)
[PULL 11/41] target/arm: Implement HCR_EL2.AT handling, Peter Maydell, 2024/01/11
[PULL 10/41] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NV, Peter Maydell, 2024/01/11
[PULL 13/41] target/arm: Always honour HCR_EL2.TSC when HCR_EL2.NV is set, Peter Maydell, 2024/01/11
[PULL 16/41] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0,
Peter Maydell <=
[PULL 28/41] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits, Peter Maydell, 2024/01/11
[PULL 25/41] target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1, Peter Maydell, 2024/01/11
[PULL 23/41] target/arm: Always use arm_pan_enabled() when checking if PAN is enabled, Peter Maydell, 2024/01/11
[PULL 15/41] target/arm: Record correct opcode fields in cpreg for E2H aliases, Peter Maydell, 2024/01/11
[PULL 34/41] target/arm: Mark up VNCR offsets (offsets 0x0..0xff), Peter Maydell, 2024/01/11
[PULL 33/41] target/arm: Report VNCR_EL2 based faults correctly, Peter Maydell, 2024/01/11
[PULL 29/41] target/arm: Implement VNCR_EL2 register, Peter Maydell, 2024/01/11
[PULL 32/41] target/arm: Implement FEAT_NV2 redirection of sysregs to RAM, Peter Maydell, 2024/01/11
[PULL 37/41] target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC), Peter Maydell, 2024/01/11
[PULL 36/41] target/arm: Mark up VNCR offsets (offsets 0x168..0x1f8), Peter Maydell, 2024/01/11