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Re: [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU
From: |
Daniel P . Berrangé |
Subject: |
Re: [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU |
Date: |
Wed, 31 Jan 2024 10:28:42 +0000 |
User-agent: |
Mutt/2.2.12 (2023-09-09) |
On Wed, Jan 31, 2024 at 06:13:29PM +0800, Zhao Liu wrote:
> From: Zhao Liu <zhao1.liu@intel.com>
>
> Hi list,
>
> This is the our v8 patch series, rebased on the master branch at the
> commit 11be70677c70 ("Merge tag 'pull-vfio-20240129' of
> https://github.com/legoater/qemu into staging").
>
> Compared with v7 [1], v8 mainly has the following changes:
> * Introduced smp.modules for x86 instead of reusing current
> smp.clusters.
> * Reworte the CPUID[0x1F] encoding.
>
> Given the code change, I dropped the most previously gotten tags
> (Acked-by/Reviewed-by/Tested-by from Michael & Babu, thanks for your
> previous reviews and tests!) in v8.
>
> With the description of the new modules added to x86 arch code in v7 [1]
> cover letter, the following sections are mainly the description of
> the newly added smp.modules (since v8) as supplement.
>
> Welcome your comments!
>
>
> Why We Need a New CPU Topology Level
> ====================================
>
> For the discussion in v7 about whether we should reuse current
> smp.clusters for x86 module, the core point is what's the essential
> differences between x86 module and general cluster.
>
> Since, cluster (for ARM/riscv) lacks a comprehensive and rigorous
> hardware definition, and judging from the description of smp.clusters
> [2] when it was introduced by QEMU, x86 module is very similar to
> general smp.clusters: they are all a layer above existing core level
> to organize the physical cores and share L2 cache.
>
> However, after digging deeper into the description and use cases of
> cluster in the device tree [3], I realized that the essential
> difference between clusters and modules is that cluster is an extremely
> abstract concept:
> * Cluster supports nesting though currently QEMU doesn't support
> nested cluster topology. However, modules will not support nesting.
> * Also due to nesting, there is great flexibility in sharing resources
> on clusters, rather than narrowing cluster down to sharing L2 (and
> L3 tags) as the lowest topology level that contains cores.
> * Flexible nesting of cluster allows it to correspond to any level
> between the x86 package and core.
>
> Based on the above considerations, and in order to eliminate the naming
> confusion caused by the mapping between general cluster and x86 module
> in v7, we now formally introduce smp.modules as the new topology level.
What is the Linux kernel calling this topology level on x86 ?
It will be pretty unfortunate if Linux and QEMU end up with
different names for the same topology level.
With regards,
Daniel
--
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- [PATCH v8 12/21] i386: Introduce module level cpu topology to CPUX86State, (continued)
- [PATCH v8 12/21] i386: Introduce module level cpu topology to CPUX86State, Zhao Liu, 2024/01/31
- [PATCH v8 16/21] i386/cpu: Introduce module-id to X86CPU, Zhao Liu, 2024/01/31
- [PATCH v8 13/21] i386: Support modules_per_die in X86CPUTopoInfo, Zhao Liu, 2024/01/31
- [PATCH v8 15/21] i386: Support module_id in X86CPUTopoIDs, Zhao Liu, 2024/01/31
- [PATCH v8 17/21] tests: Add test case of APIC ID for module level parsing, Zhao Liu, 2024/01/31
- [PATCH v8 14/21] i386: Expose module level in CPUID[0x1F], Zhao Liu, 2024/01/31
- [PATCH v8 18/21] hw/i386/pc: Support smp.modules for x86 PC machine, Zhao Liu, 2024/01/31
- [PATCH v8 19/21] i386: Add cache topology info in CPUCacheInfo, Zhao Liu, 2024/01/31
- [PATCH v8 20/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4], Zhao Liu, 2024/01/31
- [PATCH v8 21/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14], Zhao Liu, 2024/01/31
- Re: [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU,
Daniel P . Berrangé <=