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[PULL 35/46] bios-tables-test: Add complex SRAT / HMAT test for GI GP
From: |
Michael S. Tsirkin |
Subject: |
[PULL 35/46] bios-tables-test: Add complex SRAT / HMAT test for GI GP |
Date: |
Tue, 4 Jun 2024 15:08:04 -0400 |
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Add a test with 6 nodes to exercise most interesting corner cases
of SRAT and HMAT generation including the new Generic Initiator
and Generic Port Affinity structures. More details of the
set up in the following patch adding the table data.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240524100507.32106-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 92 ++++++++++++++++++++++++++++++++++
1 file changed, 92 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index d1ff4db7a2..1651d06b7b 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1862,6 +1862,96 @@ static void test_acpi_q35_tcg_acpi_hmat_noinitiator(void)
free_test_data(&data);
}
+/* Test intended to hit corner cases of SRAT and HMAT */
+static void test_acpi_q35_tcg_acpi_hmat_generic_x(void)
+{
+ test_data data = {};
+
+ data.machine = MACHINE_Q35;
+ data.variant = ".acpihmat-generic-x";
+ test_acpi_one(" -machine hmat=on,cxl=on"
+ " -smp 3,sockets=3"
+ " -m 128M,maxmem=384M,slots=2"
+ " -device virtio-rng-pci,id=gidev"
+ " -device pxb-cxl,bus_nr=64,bus=pcie.0,id=cxl.1"
+ " -object memory-backend-ram,size=64M,id=ram0"
+ " -object memory-backend-ram,size=64M,id=ram1"
+ " -numa node,nodeid=0,cpus=0,memdev=ram0"
+ " -numa node,nodeid=1"
+ " -object acpi-generic-initiator,id=gi0,pci-dev=gidev,node=1"
+ " -numa node,nodeid=2"
+ " -object acpi-generic-port,id=gp0,pci-bus=cxl.1,node=2"
+ " -numa node,nodeid=3,cpus=1"
+ " -numa node,nodeid=4,memdev=ram1"
+ " -numa node,nodeid=5,cpus=2"
+ " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
+ "data-type=access-latency,latency=10"
+ " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=800M"
+ " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
+ "data-type=access-latency,latency=100"
+ " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
+ "data-type=access-latency,latency=100"
+ " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
+ "data-type=access-latency,latency=200"
+ " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=400M"
+ " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
+ "data-type=access-latency,latency=500"
+ " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=100M"
+ " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
+ "data-type=access-latency,latency=50"
+ " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=400M"
+ " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
+ "data-type=access-latency,latency=50"
+ " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=800M"
+ " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
+ "data-type=access-latency,latency=500"
+ " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=100M"
+ " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
+ "data-type=access-latency,latency=20"
+ " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=400M"
+ " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
+ "data-type=access-latency,latency=80"
+ " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
+ "data-type=access-latency,latency=80"
+ " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
+ "data-type=access-latency,latency=20"
+ " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=400M"
+ " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
+ "data-type=access-latency,latency=20"
+ " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=400M"
+ " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
+ "data-type=access-latency,latency=80"
+ " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
+ "data-type=access-latency,latency=80"
+ " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=200M"
+ " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
+ "data-type=access-latency,latency=10"
+ " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
+ "data-type=access-bandwidth,bandwidth=800M",
+ &data);
+ free_test_data(&data);
+}
+
#ifdef CONFIG_POSIX
static void test_acpi_erst(const char *machine)
{
@@ -2304,6 +2394,8 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/q35/nohpet", test_acpi_q35_tcg_nohpet);
qtest_add_func("acpi/q35/acpihmat-noinitiator",
test_acpi_q35_tcg_acpi_hmat_noinitiator);
+ qtest_add_func("acpi/q35/acpihmat-genericx",
+ test_acpi_q35_tcg_acpi_hmat_generic_x);
/* i386 does not support memory hotplug */
if (strcmp(arch, "i386")) {
--
MST
- [PULL 26/46] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response, (continued)
- [PULL 26/46] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response, Michael S. Tsirkin, 2024/06/04
- [PULL 25/46] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support, Michael S. Tsirkin, 2024/06/04
- [PULL 27/46] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents, Michael S. Tsirkin, 2024/06/04
- [PULL 28/46] hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions, Michael S. Tsirkin, 2024/06/04
- [PULL 29/46] hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support, Michael S. Tsirkin, 2024/06/04
- [PULL 30/46] hw/mem/cxl_type3: Allow to release extent superset in QMP interface, Michael S. Tsirkin, 2024/06/04
- [PULL 31/46] hw/acpi/GI: Fix trivial parameter alignment issue., Michael S. Tsirkin, 2024/06/04
- [PULL 32/46] hw/acpi: Insert an acpi-generic-node base under acpi-generic-initiator, Michael S. Tsirkin, 2024/06/04
- [PULL 33/46] hw/acpi: Generic Port Affinity Structure support, Michael S. Tsirkin, 2024/06/04
- [PULL 34/46] bios-tables-test: Allow for new acpihmat-generic-x test data., Michael S. Tsirkin, 2024/06/04
- [PULL 35/46] bios-tables-test: Add complex SRAT / HMAT test for GI GP,
Michael S. Tsirkin <=
- [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Michael S. Tsirkin, 2024/06/04
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Richard Henderson, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Jonathan Cameron, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Jonathan Cameron, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Richard Henderson, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Jonathan Cameron, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Jonathan Cameron, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Richard Henderson, 2024/06/05
- Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc), Jonathan Cameron, 2024/06/05
[PULL 37/46] scripts/update-linux-headers: Copy setup_data.h to correct directory, Michael S. Tsirkin, 2024/06/04